My customer is confused about AD5698R READ OPERATION.
Is it possible for you to confirm the I2C Read Operation timing?
Please find attached file. These are I2C timing chart.
As I pointed out, there are "ACK. BY Master" and the other. Compared with AD5698 and AD5698R. It seems different each other.
The customer is afraid of its typo.
For the timing chart, see the table below.
For the FRAME 2 command byte format, use NOP command then the address on which DAC you want to read.
The data will be the FRAME 4 and FRAME 5. You may choose not to read FRAME 6 anymore. If you still decide to read FRAME 6, that will be the 1st byte of the register of the next DAC.