I have a problem with the i2c Interface of the AD5696R.
I wrote a test procedure with the intention to test my read an write function for an EEPROM which shares the bus with two of these DACs and some other IC. This functions sends multiple bytes starting with value 0x10 and increasing it by 1 with each byte.
For some strange reason the AD5696 responds to a bit-pattern that matches its address (one is configured ad 0x0E, the other 0x0F) in the middle of the transfer.
As result the master (an Atmel SAMA5D3) does release the clock line when it recognizes the "second master" that drives against it's data line. This Situation is shown on the screenshot. The test procedure sends the Bytes 0x1A, 0x1B, 0x1C and at last a 0x1D which matches the 0x0E address followed by 1 bit for a read transfer. I assume the DAC now sends it's ack which is transparent for the master as the regular adressed slave also sends an ack. Now the DAC sends 3 additional zeros witch are also transparent because the master is sending the first 3 bits of 0x1D. In the moment the master releases the data line to send the first 1 it recognizes someone forced the line to zero and stops sending data
I'm not able to end the transfer by manually generating clock cycles. The AD5696 is freezed in its state. Only a reset can release the data line.
If I disconnect the DAC with adress 0x0E from the bus the same problem appears with a pattern matching the 0xF address of the second DAC.
Do you have any idea?