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AD5672R Daisy chain not working

Hello

I'm currently working on daisy chaining 2 AD5672R DACs together, I've sent in the command(1000 and DB0=1) to enable the daisy chain mode but it doesn't seem to be responding to the command. I've attached a snap of the chipscope signals and i believe it is what is recommended on the datasheet. The first 8 writes are for the first AD5672R and the secnond 8(longer writes) are for the second AD5672R. could you please advice me on the normal process for daisy chaining these DACS. Also not seen in the pics is the LDAC is held low for the duration of the run any help would be great.

Thank you 

attachments.zip
  • Hi,

    Can you please detail the frame by frame contents by chronological order? typical procedure is you set first device to enable daisy chain mode, then it can pass the enable daisy chain mode to second device. once they are all in daisy chain mode, you can push 48-bit frames (since you have 2 DACs) containing other commands, addresses and data, the first 24-bit is for the second device, and the second 24-bit is for the first device. 

    Cheers,

    Ivan

  • Hello Ivan

    Here are some shoots of the signals that are going to the DACs, the yellow is the SCK, green is DAC1_DIN, and blue is DAC2_DIN. I managed to get the first DAC to enable the daisy chain mode but i cant seem to program the second DAC. It seems that im missing something painfully obvious.

    pic1: setting the DACs to daisy chain mode

    pic2: sending in register for 1st DAC(seems to program ok)

    pic3: sending in register for 2nd DAC(does not program)

    as a note there seems to be areas in the sequence where the data gets a little jammed up, this might be causing my issues. pics 4 and 5 show these areas.

    pic4: first write command for first DAC

    pic5: write command for DAC 7 of first DAC and DAC 0 of second DAC

  • Hi,

    Based on the waveforms you provided, DAC_2 will not enter into Daisy Chain mode but we expect it to process the command it receives. 

    Using pic5 you posted, I divided the stream of data into frames, frame 1 consists of only 24 clk cycles but frames 2,3,4... consists of 48 clk cycles each. As you can see, the first 24 bits (of frame 2,3,4) are really intended for DAC_2, and the second 24 bits are for DAC_1. We can also see that DAC_2 doesn't really process anything since it is sending NO OPERATION command (and all 24 bits are zero).

    As for pic3, can you share what was the 24 bit content for DAC_2? Kindly make sure to toggle /SYNC after the 48-bit frame is sent and set it low again before the next frame. I would also appreciate if you can also share the /SYNC and /LDAC  signals.

    Cheers,

    Ivan

  • Hello Ivan

    The reason behind the no operation command in the 48 bit frames is to enable the changing of individual DACs, also the 24 bit command for DAC2 is suppose to be the same as DAC1 (0011 0010 100000000000 000). I've been double checking the timing requirements for toggling the SYNC and LDAC pins and it seems to meet the min times. I've attached a picture of a smaller write sequence so that its easier to look at, the sequence is of the daisy chain command for the first DAC then a write to DAC7 in the first chip and a write to DAC0 in the second chip. 

    From what i can see it seems that its getting the correct bits but not reacting for some reason, oh as a note all DACs seems to program if i do a write command(24 bits) to the first 8 DACs in the first chip then do an extra no op command at the end but that method doesn't have the control-ability that im looking for. I'm able to wrtie to the first chip and and change the values to any of the 8 DACs freely but am unable to get any reaction out of the second chip when trying to program only one DAC. 

    Thank you for your help, i've been trying to debug this issue for about 2 weeks now and am starting to fall behind in my time frame for my project. I really hope that we have a brake through soon cause it would suck to have to cut traces on the board and solder wires to reconfigure the DACs series 

    yellow = SCK

    purple = SYNC

    green = DIN for chip1

    blue = DIN for chip2

    note* LDAC is held low at all times since using the write and update command.

      

    PIC1: daisy chain command for the first chip(1000 111111111111 1111)

    PIC2: write command for DAC7 in first chip ( 0011 0111 100000000000 0000)

    PIC3: write command for DAC0 in second chip ( 0011 0000 100000000000 0000)

  • Hi,

    I really would like to help you and doing my best to do so.

    From what i can see it seems that its getting the correct bits but not reacting for some reason, oh as a note all DACs seems to program if i do a write command(24 bits) to the first 8 DACs in the first chip then do an extra no op command at the end but that method doesn't have the control-ability that im looking for. I'm able to wrtie to the first chip and and change the values to any of the 8 DACs freely but am unable to get any reaction out of the second chip when trying to program only one DAC. 

    Does this mean that the main problem is that DAC_2 doesn't give the correct output even it received the command (as shown in PIC3 of your latest reply)?

    Can you also try to set DAC_2 to daisy mode before sending the commands?

    FRAME1: 24 bit setting DAC_1 to daisy mode

    FRAME2: 48 bits total, most significant (left) 24 bit = daisy mode intended for DAC_2,  least significant (right) 24 bit = NOP

    FRAME3: 48 bits total,

    most significant (left) 24 bit =  24 bit data for DAC_2,   ( 0011 0000 100000000000 0000)

    least significant (right) 24 bit = 24 bit data for DAC_1. (0011 0111 100000000000 0000)

     

    Frames 4,5,6 can be similar to frame 3.

     

    Can you try these please? 

     

    Cheers,

    Ivan

  • Hello Ivan

    that seem to do the trick, i guess since the second chip wasn't in daisy chain mode it didn't know what to do with all the extra bits i was giving. thank you so much for your help

  • Hi,

    Glad to know you were able to make it work. Welcome!

    Cheers,

    Ivan

  • Hi,

    I'm aware that your setup is already working. Can I ask you some waveforms using my previously suggested sequence?

    Can you also make sure that the part's supply biases has been reset/cycled before sending the sequence and capturing the waveforms please?

    FRAME1: 24 bit setting DAC_1 to daisy mode

    FRAME2: 48 bits total, most significant (left) 24 bit = daisy mode intended for DAC_2,  least significant (right) 24 bit = NOP

    FRAME3: 48 bits total,

    most significant (left) 24 bit =  24 bit data for DAC_2,   ( 0011 0000 100000000000 0000)

    least significant (right) 24 bit = 24 bit data for DAC_1. (0011 0111 100000000000 0000)

     

    Hoping that the waveforms taken will be similar to this one(in terms of time division):

    We just want to make sure that the sequence really works and all DACs didn't receive multiple DCENs.

    And lastly, can you also please try to capture and confirm if these second sequence also works? (power should be recycled too before doing this sequence).

    1) Frame 1: Set DAC_1 to daisy chain mode (24 bits)
    2) Frame 2: Set DAC_2 to daisy chain mode by sending NOP (24 bits) – this will just push frame 1 to DAC_2
    3) Frame 3: Send commands to DAC_1 and DAC_2 (48 bits)

    Your feedback will be very important and helpful for us. Thank you!

    Cheers,

    Ivan

  • Hello Ivan

    Sorry it took a little bit, I didn't come into work yesterday. Here are the pics of the write sequences for the second option you mentioned, the way my firmware is set up it was easier to do it that way, also i had implemented the write for all DACS back into the code(0011 addr 100000000000 0000) and included the LDAC back into the firmware. it seems to run better if i add that signal back in(LDAC not shown not enough probs). 

    I think that the first option wont work since it'll run into the same issue as before where the second chip wont know what to do with all the extra bits.

    yellow = sclk

    green = DIN for chip one

    blue = DIN for chip two

    purple = SYNC

    24 bit daisy chain then 24 no op 

    write for DAC7 of chip one then DAC0 of chip two.

  • Hi Khanh,

    Thank you for the waveforms!

    Will there be a time that you are going to try or plan to test the first suggested sequence?

    Hello Ivan

     

    that seem to do the trick, i guess since the second chip wasn't in daisy chain mode it didn't know what to do with all the extra bits i was giving. thank you so much for your help

    When this reply was posted, can you confirm what sequence did you use to enable daisy chain mode on DAC_2? is it the first sequence/option that i suggested or a modified sequence? We are very interested with the sequence used.

    In this second picture, it looks like the commands are sent alternately on the two DACs, meaning, when DAC_2 receives a command, DAC_1 is NOP. And when DAC_1 is receiving a command, DAC_2 is NOP. Am I correct?

    Can you share with me if this is really intended by design? have you tried sending commands on both DACs on a the same frame?

    I really appreciate your replies. Thank you!

    Cheers,

    Ivan