In my design i used AD669 DAC with unipolar config.
During power down, although LDAC is at ground level and parallel bus is at zero logic DAC output stays 10V while system is shutdown (nearly a few msec).
And since DAC output is 10V the circuit controlled by DAC behaves out of our scope and damage the mechanical parts.
Could you pls help me how can i prevent this?
It is not device specific, we saw the same in three separate unit.
Unfortunately there is no possibility to change sequence.
What do you think about external pup&pdown on LDAC and CS, etc?
It seems the problem related with the internal structure of DAC and most probably it lost output control during power-up and down. (by the way we see the same during power up, but the problem is power down while)
I will try to add dummy resistor across +/-15V rails.