In my design i used AD669 DAC with unipolar config.
During power down, although LDAC is at ground level and parallel bus is at zero logic DAC output stays 10V while system is shutdown (nearly a few msec).
And since DAC output is 10V the circuit controlled by DAC behaves out of our scope and damage the mechanical parts.
Could you pls help me how can i prevent this?
Could you provide a plot of Vout, /CS, /L1 and LDAC at power-down when the output goes to power-down, please?
Additionally, if you place the system in power-down... how the output goes to 10V? are you powering differently the digital and analog?