AD669 output @ power-down

Dear All,

In my design i used AD669 DAC with unipolar config.

During power down, although LDAC is at ground level and parallel bus is at zero logic DAC output stays 10V while system is shutdown (nearly a few msec).

And since DAC output is 10V the circuit controlled by DAC behaves out of our scope and damage the mechanical parts.

Could you pls help me how can i prevent this?

Regards

  • 0
    •  Analog Employees 
    on Mar 22, 2017 10:07 AM

    Hi,

    Could you provide a plot of Vout, /CS, /L1 and LDAC at power-down when the output goes to power-down, please?

    Additionally, if you place the system in power-down... how the output goes to 10V? are you powering differently the digital and analog?

    Regards,

    Miguel

  • 0
    •  Analog Employees 
    on Mar 22, 2017 11:40 AM

    Hi,

    the behavior seems strange but not impossible... Is this behavior related to a signal unit? or reproducible across multiple device?

    Could be possible to change your power-down sequence?

    Regards,

    Miguel

  • Dear Miguel;

    Thank you for response.

    Yes, analog and digital powers are separated.

    During power down firstly 5V goes down, then +-15V and finally +/-HV rails.

    And CS,L1 and LDAC are all at zero level without even any instant glitch. And under this condition we got 10V at the output of DAC, very strange.

    Pls see the schematic below.

    Regards.

  • It is not device specific, we saw the same in three separate unit.

    Unfortunately there is no possibility to change sequence.

    What do you think about external pup&pdown on LDAC and CS, etc?

    It seems the problem related with the internal structure of DAC and most probably it lost output control during power-up and down. (by the way we see the same during power up, but the problem is power down while)

    I will try to add dummy resistor across +/-15V rails.

  • I am using AD669 in bipolar and we are facing the issues . 

    following are the details of the circuit

    1. /CS, /L1 and LDAC are all tied each other.

    2. To write data we are following timing diagram of figure 1b from datasheet

    3. /CS, /L1 and LDAC (control signals) we are making initially  high then Low-> data -> control signals high -> control signal low.

    4. Negative output voltage we are getting as per data but positive voltages we are not getting.

    5. Some time negative output voltages also we are not getting

    6. Schematic is 

    Kindly help us to resolve this issue. Any care should be taken while power on and power off condition?