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Digital Pot Configuration with 3.3V Host Device

I am configuring AD5263 with 3.3V powered Spartan VI FPGA. Schematics as shown:

Since Host device is 3.3V , Vlogic =3.3V (3v3 in schematics)

DigiPot is used for Op-Amp Gain Adjustment and Op-Amp operating on ± 12V.

Vdd = +12V

Vss = -12V

No of Op-Amps = 4 ( All 4 ch. pots used)

Is this configuration correct? Please suggest.

  • Hi ETRX,

    The AD5263 can only be operated at 16.5V single supply or +/-7.5V dual supply ranges. You will be violating the absolute maximum ratings for VSS to ground (-7.5V) and VDD to VSS (16.5V). The easiest solution is to just connect VSS to ground.

    One other concern will be the voltage at A/W/B pins since there are diodes that can be forward biased when used as gain adjustment for the op-amp since the op-amp is supplied with +/-12V. See Figure 54 on the data sheet.

    Thanks and best regards,