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AD5535B channel-to-channel offsets and calibration?

Working on a custom board with several AD5535B's driving an array of devices for testing, driving the chip in the 0-50V range (VREF=1.0 V).  With the chip in power-on-reset state and all channels zeroed, I observe a steady-state DC output voltage of around 100-300 mV, apparently randomly depending on channel.  This offset seems to be preserved as voltage outputs are commanded on the DAC channels.  I see this both on my own board and on the AD5535B eval board with jumpers set according to UG-730 Fig 2.

Is this an expected level of channel-to-channel offset?  I'd assume the behavior of the eval board indicates it's inherent to this high-voltage chip, but it's always possible I've misconfigured the eval board as well as my custom one.

If it's normal, any recommendations for calibration procedures beyond compiling a brute-force lookup table?  Should I be able to use a linear correction with offset to scale my inputs, or will I need to compute a nonlinear curve fit?  This is being driven via SPI from a Xilinx Zynq-7000 with SPI cores in the FPGA fabric; if there are any drop-in logic cores that could be of assistance I'd love to know about them.

If this isn't normal, any recommendations for tracking down the root cause?

  • Hi mwhitson,

    Unfortunately the AD5535B has a very large zero code voltage (offset voltage). If you look at the specification table, the zero code voltage is typically to 500mV.  The 100mV-300mV offset at the output is quite expected due to the lower reference voltage.

    You can refer to the following article regarding calibration of DACs:

    http://www.analog.com/en/analog-dialogue/articles/open-loop-calibration-techniques.html

    Thanks and best regards,

    Rainier

  • rrosario:
    I have noticed the same thing and thank you for your answer. As a follow-up, do you know why my outputs are saturating at ~5V? Is a load required? Maybe my high voltage source isn't hooked up properly or can't sink enough current? Seems too convenient that things are saturating right around V+. Setup: Using AD5535B EVAL board. Keithley 2400 to source the Vpp and no load hooked up to AD5535 outputs (except a multimeter to measure the voltage). AD software works, but again outputs are saturating @ 5V.


    mwhitson:

    Sounds like we are doing very similar work at the moment. Do you have any recommendations or tips regarding your custom board with multiple 5535Bs? I may try your Zynq SPI approach, as that offers a lot of DSP flexibility. Did you use any capacitive sensors, as they showed in the AD5535 datasheet (under Applications)? If so, what did you have success with?

    Thanks again everyone for your insight!

  • Thanks rrosario, that's pretty much as expected but nice to confirm.

    joshg, I don't have specific recommendations, but the main things I found useful were:

    1. Understanding and following the guidelines for mixed-signal grounding, ADI has some white papers on that though I don't have the pointer handy.

    2. When you're working with higher voltages like this chip you'll want to double check your PCB layout against the appropriate IPC standards for that voltage level - trace geometry, dielectric thickness, via/hole clearances, etc.  And triple-check your other components (decoupling caps, ESD diodes, etc) for voltage ratings.

    3. Design for test and debug.  Headers, jumpers, cut-outs, and test points take up real estate, but are so very worth it.

    4. If you're intending to run this at the full 30 MHz SPI clock rate, you'll want to give some thought to timing and signal integrity over board-length traces (or off-board connections), depending on your dimensions.

    5. Pay attention to digital IO standards; this chip isn't directly compatible with LVCMOS2.5 or lower without level shifters.

    The Zynq setup works (I'm driving it from a Xilinx devel board via an FMC connector), but be ready for a lot of initial time investment if you're not already developing to that platform.  Worth it, though, since ADI has a pretty comprehensive open-source ecosystem of HDL cores and embedded Linux drivers available.  (Sadly the AD5535B is one chip that isn't directly supported, but its SPI interface is simple enough that it didn't take long to get a generic SPI driver talking to it.)

    I haven't tried capacitive sensors; this isn't for a MEMS application and I'm running it open-loop anyway.

  • Hi joshhg,

    The output range of the AD5535B is dependent on the Vpp and reference voltage. For example, to be able to output up to 50V, Vpp must be atleast 51V and  reference voltage is 1V. The load should not dictate the output range of the DAC.

    Bestregards,

    Rainier