Is it possible to use AD5700 with external clock source 3.6864 MHz to the XTAL 1, when
1) ~XTAL_EN = 0
2) CLK_CFG1 = 1
3) CLK_CFG0 = 1
The device will soon be launched into production, and I don't know whether to urgently fix or leave as is? Prototypes have been successfully tested.
If you are using an external 3.686MHz clock source on XTAL1 pin, you need to have the following configuration on these pins:
1) ~XTAL_EN = 1
2) CLK_CFG1 = 0
3) CLK_CFG0 = 0
You current configuration is using the internal 1.2288MHz crystal oscillator. Kindly see Table 7 on the data sheet for more details. I don't know how were you able to successfully tested your prototypes with the incorrect clock configuration.