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AD5592r Sequence conversion mode

Does any one use the AD5592r sequence conversion mode (or so called the burst mode)? I am experiencing some issues when use the sequence conversion mode. In general, it works fine but once a while, the AD5592r will send two consecutive channel 1 ADC value out.

for example:

The following is the correct ADC values with the correct channel inex.

0207 11C4 2197 31EB 41D4 519F 61DF 71BC

But once a while the first channel ADC will be sent twice miss the last channel ADC value

0207 0208 11C4 2196 31EB 41D3 519E 61DF

The failure rate is around 0.5%. There is no pattern. it is purely random.

I will appreciate if any one has any answer or solution.

Marc

Parents
  • Hi,

    Let us know the device schematic and all the device configurations done.

  • Hi vsethia

    I have the same problem, but the error rate is as high as 3%.

    I use EVAL-ADICUP3029 and EVAL-AD5592R-PMDZ, and the connection method is shown in the figure below.

    The code used is the following link:
    https://github.com/analogdevicesinc/EVAL-ADICUP3029/tree/master/projects/ADuCM3029_demo_ad5592r_ad5593r

    Modified only aio_dio_pdmz.c (as attached file)
    My aim is that when I enter "ais a" in the computer serial port it will perform the following actions:
    1. Set I/O 7 to BUSY signal
    2. Set I/O 0 - I/O 6 as ADC pin
    3. Execute Multichannel ADC Conversion Sequence, No Repeat (According to Figure 44 of the datasheet)
    If the first channel appears twice, the error rate is reported in the serial port

  • Please share the entire command sequence.

    When you execute the ADC conversion sequence, is there any wait time before executing? 

  • The following is the entire SPI command sequence after I powered on the board
    SPI clock rate is 1MHz

    MOSI MISO
    3850 FFFF
    0000 0003
    20AB 0000
    3850 3E5F
    0000 00AB
    2003 0000
    7DAC 7DBF
    3000 FFFF
    6800 FFFF
    28C0 FFFF
    2003 FFFF
    4830 FFFF
    4030 FFFF
    500C FFFF
    3850 FFFF
    0000 0003
    386C 0000
    0000 0000
    5A00 0000
    4030 FFFF
    500C FFFF
    4030 FFFF
    500C FFFF
    4830 FFFF
    4030 FFFF
    500C FFFF
    4830 FFFF
    4030 FFFF
    500C FFFF
    540C FFFF
    0000 0000
    4810 0000
    540C 0000
    0000 0000
    4800 0000
    1001 0000
    0000 002D
    0000 003C
    F03C 0004
    1002 0000
    0000 003C
    0000 101C
    E01C 0000


    After the boot init program is completed,
    when I enter "ais a" in the computer serial port it will perform the following actions:
    1. Set I/O 7 to BUSY signal
    2. Set I/O 0-I/O 6 as ADC pin
    SPI commands are as follows:

    MOSI MISO
    3860 7FFF
    0000 0030
    41B0 0000
    207F 0002


    Then it will run an infinite loop, repeatedly reading the ADC value

    MOSI MISO
    107F 187F
    0000 1010
    0000 016E
    0000 114A
    0000 20E9
    0000 30A6
    0000 4025
    0000 5000
    0000 6027


    The picture below is an abnormal situation. The data of channel 1 should appear in the highlighted yellow box, but instead the data of channel 0 appears. The probability of this abnormality is about 3%
    (I have waited for the BUSY signal to be pulled to high level before performing ADC reading)

  • If you want to run the ADC sequencer in infinite loop, set the REP bit to 1.

Reply Children
  • Hi vsethia,

    By your suggestion, if we don't change the command and keep repeat reading the ADC, no matter how long it takes before the next cs falling, AD5592R will keep returned the correct value, right?


    Another question, if we want to stop repeat reading ADC, should we need to add a "nop" before the new command or just send the new reading command?

    Many Thanks

  • Please elaborate on your first question. 

    If you want to keep the ADC sequencer running repeatedly, you need to set the REP to 1 once, and keep the digital patterns running as shown in Figure 43 or 45. and the ADC will return the correct value. 

    For the second question, you need to reset the REP bit and clear all ADC channels in the ADC sequence register. 

    If the REP bit is clear, once all the ADC channels are converted, ADC goes three-state.