I have some question about AD5791's linearity analysis.
User guide ( UG-1152 ) have shows us that INL graphic is measured by NPLC = 10, step size = 1024 .
However Evaluation Board User Guide ( UG-185 ) said that NPLC = 1, step size = 1024 but measurement takes ~ 75 sec.
I tried some experiment about different NPLC of 34410A, and PLC = 10 can get better DNL graphic than PLC = 1.
Does the PLC affect performance significantly ?
Higher NPLC improves the accuracy of your multimeter. This is the reason why you are seeing "better" performance with higher NPLC.
Thank you for your reply, may I say that although higher NPLC accompany longer integration time to fetch DAC VOUT,
performance is no relation about DAC's update rate or settling time ?
Since my update rate is measured by RX's flag frequency ( RX receive SDIN to set DAC code ) and I found that
1. PLC = 10, RX receive SDIN only 1.43 Hz ( measure vout ~ 0.7 sec );
2. PLC = 1, RX receive SDIN only 25 Hz ( measure vout ~ 0.04 sec );
Another question: what is the EVAL Board flow to measure vout about 75 sec on UG-185 file ?
INL results are actually good for the A version. The results are well within the +/- 4 LSB specification.
Can you provide a schematic of your test board?
The figure are my test board about AD5791 schematic.
For some reason I use OPA2277 ( TI device ) as voltage reference....
Please help me to check and give suggestion for them, thank you!
Btw, I've tried LT3045 as voltage reference, but the monotonicity was not good so I change to use N6705B.
LT3045 is not a recommended voltage reference for the AD5791. It has a larger noise output compared to regular voltage references
I would suggest for your to use the recommended reference sources in UG-1152 .
Thank you for your reply.
I think I'll try 3458A to measure my test board first. ( if I can find this instrument.. )
Does the excel file have wrong definition for performance parameter ?
I think my absolute error was wrong.. they shouldn't shift 1 to get AE( DAC code)...
Absolute error should be
[ real VOUT( DAC code ) - ideal VOUT( DAC code ) ]/ VLSB
[ real VOUT( DAC code ) - ideal VOUT( DAC code ) ]/ VLSB " + 1 "
Is that right ?
Yes, you should not have "+1" to compute for the absolute error.
I'm assuming that you are computing for the delta from the ideal computed output value and is expressed in LSBs.
Thank you for your reply!
I've correct the " +1 " to compute absolute error, base on this reason I think INL graphic will almost the same as Absolute error graphic ( fig.1 ) and that is why INL is relative accuracy.
Is that right ?
( fig.1: after correct +1 to compute Absolute error )
Absolute error is different from INL. For the INL computation, you will use a computed LSB instead of the ideal LSB.
The computed LSB is equal to (Full scale measured - zero scale measured)/ 2^20.