I have some question about AD5791's linearity analysis.
User guide ( UG-1152 ) have shows us that INL graphic is measured by NPLC = 10, step size = 1024 .
However Evaluation Board User Guide ( UG-185 ) said that NPLC = 1, step size = 1024 but measurement takes ~ 75 sec.
I tried some experiment about different NPLC of 34410A, and PLC = 10 can get better DNL graphic than PLC = 1.
Does the PLC affect performance significantly ?
Higher NPLC improves the accuracy of your multimeter. This is the reason why you are seeing "better" performance with higher NPLC.
Thank you for your reply, may I say that although higher NPLC accompany longer integration time to fetch DAC VOUT,
performance is no relation about DAC's update rate or settling time ?
Since my update rate is measured by RX's flag frequency ( RX receive SDIN to set DAC code ) and I found that
1. PLC = 10, RX receive SDIN only 1.43 Hz ( measure vout ~ 0.7 sec );
2. PLC = 1, RX receive SDIN only 25 Hz ( measure vout ~ 0.04 sec );
Another question: what is the EVAL Board flow to measure vout about 75 sec on UG-185 file ?
Settling time could affect your accuracy. You have to wait for the output to settle before taking any measurements.
If you have a low NPLC, chances are you would be sampling the output while it is still changing and haven't settled yet..
In these accuracy measurements, please use a higher resolution multimeter like the 3458A.
For the eval board flow, refer to "Measure DAC Output" section on the user guide.
Thank you for your reply,
I am not sure whether I can get this instrument...
One more question, the excel file is my analyse result for AD5791 ( A-Version ) on my test board .
Could you help me to check whether there is some error in this excel ? thank you.
INL results are actually good for the A version. The results are well within the +/- 4 LSB specification.
Can you provide a schematic of your test board?