Protecting AD5675 SDA line from power sequence

In some applications we would like to have an I2C bus shared by several devices, each one powering up at different times. Special attention must be paid to the power-up sequence to avoid glitches in SCL and SDA lines that could be interpreted as legitimate bus activity.

In a typical application the SDA line would be pulled up to VLOGIC (usually 3.3V) so that its idle state is a high level.

In the case of the AD5675, the SDA line has an open drain driver that forces a low state when VLOGIC is supplied earlier than VDD. When VDD reaches a certain threshold the SDA line is released as shown in the figure below. This behavior creates an unwanted glitch on the SDA line, followed by a low level that could interfere the communication of other devices sharing the I2C bus.

The low-cost solution would be adding a NMOS transistor to force VLOGIC to be enabled after VDD is active, as shown in the picture below. With a careful selection of the transistor’s VGS threshold the designer can control at which VDD level VLOGIC gets enabled. The criterion to select the transistor should be:

VGSTH < VDDmin – VLOGIC max

An NMOS transistor that satisfies this requirement is NXP PMF63UNE. In addition, it has reasonable cost and size (SOT-323). The traditional 2N7002 is not appropriate for VLOGIC at 3.3V and VDD at 5V.

Model

VGSTH (V)

Package

Cost for 1K units (USD)

PMF63UNE

0.7

SOT-323

0.079

BSH111BK

1

SOT-23

0.035

BSN20BK

1

SOT-23

0.045

NX7002BKW

1.5

SOT-323

0.016

The pull-up resistor can be connected to the gated supply or to a constant rail. Having the pull-up resistor on the gated supply ensures that the digital section is not supplied from the SDA line through the ESD diodes. However, if the bus is shared among several devices the SDA line should be pulled up to the supply of the I2C master and this risk should be evaluated.

The following graph shows the result of the simulation using PMF63UNE. 3.3V is present earlier than 5V but the VLOGIC line starts rising with the slope of the 5V rail. Additional delay can be added using an RC network.