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AD5292 AD5293 Internal Shift Register Content After SYNC Went High


With the AD5292 and AD5293 a high edge on _SYNC either has the chip consider the bits in the shift register as command or data, or it has the chip consider that edge as a PSI reset, if the number of clock edges was no multiple of 16.

What happens with the values in the shift register after that or at/before the _SYNC goes low again?

If I daisy chain ten AD5292 and want to only talk to the first five, can I then just clock in the 80 bits for the first 5 devices and raise _SYNC in order to let the 5 chips output their data, and do this several times?

Like after _SYNC goes high (and the data is considered or not, depending on the clock cont being a multiple of 16), are the shift register bits reset, or do the values keep stored and are used by the last five chips, if I only clock 80 new data bits in the next time again?



Typo in title
[edited by: GerdF at 1:21 PM (GMT 0) on 23 Apr 2020]
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