AD5696 Vref power up behaviour

Recently i got a power up issue of a external reference circuit for AD5696, it resulted in a lower then expected reference voltage.

The reason for this was the Vref-Input of AD5696. It actually started to output 2.4V a few ms earlier then the reference. This doesn't occurs always but more in a random way.

Once the AD5696 starts outputing on Vref, it loads the reference voltage with several mA and keept it on the lower level.

As soon as the nRESET-Pin of AD5696 goes high, Vref-Pin switchs back to input state and everything is fine again.

Additional nRESET cycles don't change this input state back to output. Thus all good from this point on.

Just want to share this information, as it might have other side effects in other designs.

So far it is no real issue in my design anymore.