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Documents How are the differences in the DBx pinouts between the AD7606C‑16 and AD7606C‑18 reflected on their respective evaluation boards, given that the EVAL‑AD7606C18FMCZ and EVAL‑AD7606C16FMCZ share the same schematic and PCB layout?
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  • +Documents
  • +General: FAQ
  • +AD1139: FAQ
  • +AD7091R Conversion Result Change
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  • -AD7606C: FAQ
    • How to measure AD7606C die temperature with the diagnostic multiplexer?
    • How does the device manage to achieve simultaneous sampling?
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    • EVAL-AD7606EDZ Schematic
    • How are the differences in the DBx pinouts between the AD7606C‑16 and AD7606C‑18 reflected on their respective evaluation boards, given that the EVAL‑AD7606C18FMCZ and EVAL‑AD7606C16FMCZ share the same schematic and PCB layout?
    • How does the FRSTDATA operation function for the AD7606C-16 (1 SDO 3-Wire)?
    • How does the FRSTDATA operation function for the AD7606C-16 (1 SDO 4-Wire) ?
    • How does the FRSTDATA operation function for the AD7606C-16 (2 SDO 4-Wire)?
    • How does the FRSTDATA operation function for the AD7606C-16 (4 SDO 4-Wire)?
    • How does the FRSTDATA operation function for the AD7606C-18 (1 SDO 3-Wire)?
    • How does the FRSTDATA operation function for the AD7606C-18 (1 SDO 4-Wire) ?
    • How does the FRSTDATA operation function for the AD7606C-18 (4 SDO 4-Wire)?
    • How does the FRSTDATA operation function for the AD7606C-18(2 SDO 4-Wire)?
    • How to migrate an existing AD7608/9 design to the newer AD7606C-18, while enabling the advanced features
    • If using the AD7606B/C in serial interface mode, can I leave /WR floating?
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How are the differences in the DBx pinouts between the AD7606C‑16 and AD7606C‑18 reflected on their respective evaluation boards, given that the EVAL‑AD7606C18FMCZ and EVAL‑AD7606C16FMCZ share the same schematic and PCB layout?

The EVAL‑AD7606C18FMCZ evaluation board is designed for the AD7606C‑18, while the EVAL‑AD7606C16FMCZ supports the AD7606C‑16. Although both ADCs are pin‑to‑pin compatible, there are important differences in the parallel output DBx (data bus) pin assignments. The exact DBx mappings for each device are provided in their respective datasheet pin‑description tables.

Both evaluation boards use the same hardware schematic and PCB layout, meaning the overall board design is shared. However, the hardware labels, particularly the parallel output test‑point labels on connector P1, were originally based on the AD7606C‑16 pinout.

Because the AD7606C‑18 has a different DBx pin mapping, the test‑point labels on the EVAL‑AD7606C18FMCZ (P1) must be updated to reflect the correct AD7606C‑18 data‑bus assignments. The correct set of labels for the EVAL‑AD7606C18FMCZ is provided in the attached reference.

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