The right leg drive amplifier or reference amplifier within the ADAS1000 is used as part of a feedback loop to force the patient’s common-mode voltage close to the internal 1.3 V reference level (VCM_REF) of the device. By using the RLD feature, it effectively centres the electrode input voltages relative to the input span, providing maximum input dynamic range.
A common question around the RLD function is related to what happens if I don't use the RLD?
The significant benefit of the RLD feature is to improve CMRR performance, thereby rejecting noise and interference from external sources such as fluorescent lights or other patient-connected instruments, and absorbs the dc or ac lead-off currents injected on the ECG electrodes.
Take a look at the response of the ADAS1000 during ECG capture from a patient simulator. This shows a 3-lead configuration of Lead I/II/III.
As you can see, when the RLD is not connected, there is significant contribution of mains noise onto the ECG signal of interest.
With RLD connected:
Without RLD connected:
More about the RLD function itself:
Within the ADAS1000, the RLD amplifier can be used in a variety of ways. Looking at the block diagram below, the area within the thick black line encompasses what's inside the ADAS1000. A number of external passive components are used outside the ADAS1000 device to configure the gain. These are left external to ensure flexibility for the customer.
One of the components, Rin, is optional. It can be provided externally, alternatively, the internal 10k series resistors shown in each electrode path can be used as this "Rin" resistor (any combination of these switches, SW1 to SW6 can be closed) with the Rin resistance value changing depending on how many are closed.
The input of the RLD amplifier comes from the CM_OUT signal, either externally via the CM_OUT pin or internally.
The DC gain of the RLD amplifier is set by the ratio of the external RFB to the effective RIN value (internal or external).
The dynamics and stability of the RLD loop depend on the chosen DC gain and the resistance and capatiance of the patient cabling. Typically loop compensation using external component will be required. In some cases, lead or lag compensation may be required.
Patient protection resistor in the RLD path
Note that the RLD amplifiers short circuit current capability exceeds the acceptable current that can be driven onto a patient (set by the various medical standards). A patient protection resistor is required in series with the RLD_OUT pin to the patient cable to achieve compliance with the medical standards.
I would say that I do not have an expectation externally. Can you do me a favor and post the questions in the discussion area of EngineerZone rather than replying here? Thanks, Padraic
A quick question. Do you expect any external pull up or pull down resistors at the sensors inputs for bias current for the input amplifiers of the chip ?
The ADAS1000 is designed primarily to operate from a single supply for a DC coupled system where the ECG input paths are centered around an internally generated voltage (VCM_REF = 1.3), this ensures that the signal of interest is in the middle of the ADC input range. In the traditional wet electrode application the RLD (Right leg drive) closes the loop driving the patient to this 1.3V level thus ensuring that the ECG inputs sit on a 1.3V.
However, the ADAS1000 is capable of be used in applications using dry electrodes, this does introduce extra items that need to be considered. Because of the AC coupling of the dry electrodes, the ECG input signal will now be sitting on 0V. This is outside the ADC input range, so a valid measurement would not be possible. To correct this, the ADAS1000 could be operated from a dual supply voltage (instead of the single supply 3.3V). ideally AVCC = 2.3V/ AVSS (AGND/DGND) = -1.3V as this ensures the VCM_REF/RLD = 0V, this will again center the ECG signal in the center of the ADC input range. Alternatively +/-1.8V could be used, which would result in an offset in the RLD of ~-0.5V. As the ADAS1000 was designed for single supply operation, this “skewing” of the supply causes another sideeffect – the digital interface is supplied by DGND/IOVDD with the logic levels biased from DGND, as DGND will now be at a negative voltage, the logic levels will be referenced to this negative voltage – i.e. no longer CMOS compatible. One method of getting around this would be to use an isolator to level translate the digital interface between the ADAS1000 and the host controller.
Modifying the RLD ckt and reprogramming CMREFCTL register didn't help us. Can you tell me if ADAS100 based design needs any OP AMP buffer in the front end especially when using dry electrodes ?
Check if the RLD is connected and that you have the part to drive out the RLD. My advice would be to check what have you written to the CMREFCTL register. See table 30 of the datasheet.