What is the ADA2200?
The ADA2200 is a synchronous demodulator for signal conditioning in industrial and medical and applications. The signal processing is performed entirely in the analog domain by charge sharing among capacitors, which eliminates the effects of quantization noise and rounding errors. The ADA2200 includes an analog domain, low-pass decimation filter, a programmable infinite impulse response (IIR) filter, and a mixer. This combination of features produces a low power, small footprint synchronous demodulator.
What is a synchronous demodulator?
Synchronous demodulators, also known as lock-in amplifiers, enable accurate measurement of small ac signals in the presence of noise interference orders of magnitude greater than the signal amplitude. Synchronous demodulators use phase sensitive detection to isolate the component of the signal at a specific reference frequency and phase. It is possible to measure signal amplitude, phase or both.
To which applications is synchronous demodulation best suited?
Synchronous demodulation is best suited to applications where the sensor can utilize an ac excitation that can be synchronized to the ADA2200 system clock. Synchronous demodulation is especially useful when the recovered signal from the sensor is likely to have a significant noise component. This could be in the form of background light in the case of a photodiode application, or in the face of power supply noise or other impairments.
What frequency ranges can this device cover?
There are two key frequencies that are of interest to an application, the reference frequency and the modulation bandwidth. The reference frequency corresponds to the excitation frequency of the sensor. The modulation bandwidth refers to how fast the signal to be measured can change.
The allowable range of reference frequency and modulation bandwidth that the ADA2200 supports is directly related to the input clock frequency. The input sample clock frequency range is between 1 KHz and 1 MHz. The ADA2200 allows the reference clock to be set to the input sample clock, fSI, divided by 32 or 64. The input sample clock frequency range is between 1KHz and 1MHz, which results in a refclk frequency range of 15.625 Hz to 31.25KHz.
The modulation bandwidth can be a dc signal or up to FSI/32, or 31.25KHz.
What is sampled-analog technology?
Sampled anlog technology (SAT) works on the principle of charge sharing. A sampled analog signal is a stepwise continuous signal without amplitude quantization. This contrasts with a signal sampled by an ADC, which becomes a discrete time signal with quantized amplitude.
To implement discrete time filters, the mathematical operations of a time delay, multiplication and addition are required. The SAT employed by the ADA2200 performs these basic mathematical functions in the analog domain by charge sharing among capacitors. The ADA2200 makes use of this analog domain signal processing in the low-pass decimation filter, programmable IIR filter, and a mixer functions.
What are the advantages of ADA2200 versus discrete or previous approaches?
The combination of features incorporated in the ADA2200 enables reduced ADC sample rates and lowers the downstream digital signal processing requirements of the signal. This can enable reduced power consumption along with lower cost ADCs and simpler, lower cost digital signal processing.
Do I need to program this device?
Programming the device may not be required. The default configuration of the device is suitable for many applications. If your application would benefit from a different configuration, the part can be reconfigured in two different ways. The device has configuration registers that can be directly programmed over the SPI interface. The ADA2200 can also load the contents of an external EEPROM into its configuration registers for systems without a processor to control the ADA2200.
How can I get I and Q components?
If the relative phase of the input signal to the ADA2200 is constant, the output amplitude is directly proportional to the amplitude of the input signal and can be readily found from the ADA2200 output. Conversely if the amplitude of the input signal to the ADA2200 remains constant, the output amplitude is a function of the relative phase of the input signal and can be found from the ADA2200 output. The “APPLICATIONS INFORMATION” section of the ADA2200 datasheet gives a thorough explanation of the relationship between the input signal amplitude, relative phase and ADA2200 output signals.
Can I get different filter configurations?
The on-chip IIR filter can be programmed to a wide variety of different filter transfer functions. If your application requires a different filter shape, see the ADA2200 wiki support page for a list of available filter configurations and corresponding coefficients.
Are there evaluation boards available?
There are two different evaluation boards available, the ADA2200-EVALZ and the ADA2200SDP-EVALZ. The ADA2200-EVALZ is a streamlined board that enables device evaluation and provides device reconfiguration through an on-board EEPROM. The ADA2200SDP-EVALZ has additional on-board signal processing circuitry and allows the device to be reconfigured over the SPI port via a PC resident GUI program. This board requires the use of the SDP-S evaluation board.
What are the recommended ADCs to use with the ADA2200?
The ADC selection will depend on the application details, but we suggest considering the following ADCs:
For 12-bit performance, low power, sigma-delta architecture consider the AD7170.
For 16-bit performance, low power, sigma-delta architecture consider the AD7171. For 12-bit performance, low power, successive approximation architecture consider the AD7091R or AD7091 with the voltage reference.
For 12-bit performance, low power, multi-channel successive approximation architecture consider the AD7928
How do I program a filter? What filters are available?
If a different frequency response is required, the IIR can be programmed for a different response. Register 0x0011 through Register 0x0027 contain coefficient values that program the filter response. To program the filter, first load the configuration registers (Register 0x0011 through Register 0x0027) with the desired coefficients. The coefficients can then be loaded into the filter by writing 0x03 to Register 0x0010.
See the ADA2200 wiki support page for a list of available filter configurations and corresponding coefficients.
How do I program the reference clock?
The frequency of the reference clock output (fREFCLK) determines, and is equal to, the internal mixing frequency. fREFCLK is a function of fCLKIN and two programmable parameters, CLKIN_DIV and RCLK_DIV. fREFCLK is calculated as,
fREFCLK = fCLKIN/8/CLKIN_DIV/RCLK_DIV
Can I have single ended output, with differential inputs, or vice versa?
Using the ADA2200 in differential mode utilizes the full dynamic range of the device and provides the best noise performance and common-mode rejection. However, if a single-ended input configuration is desired, connect INN to VOCM and use INP as a single-ended input.
Note that differences between the common-mode levels between the INP and INN inputs result in an offset voltage inside the device. Even though the BPF removes the offset, minimize the offset to avoid reducing the available signal swing internal to the device.
For single-ended outputs, either OUTP or OUTN can be used. Leave the unused output floating.
How do I synchronize this device to my system?
The sensor excitation signal needs to be synchronized with the ADA2200. The simplest way to achieve this is to use the REFCLK output of the ADA2200 to provide the sensor excitation signal directly, or to use the REFCLK output as a trigger for the sensor excitation signal. For reasons discussed in the next question, the ADC sample clock and the ADA2200 CLKIN should also be synchronized.
What kind of ADC should I use to sample the ADA2200 output?
The answer depends on the demodulated bandwidth required and the amount of digital filtering resources available. For demodulated bandwidths above 1KHz, a SAR converter is likely the best choice. For demodulated bandwidths under 1KHz, a sigma delta converter will likely offer better performance with less digital filtering burden on the processor.
Why is this so?
Ideally only the envelope signal corresponding to the parameter to be measured remains at the output of the ADA2200. In practice, spurs at multiples of the excitation frequency also appear at the output and can be difficult to remove completely with an analog low-pass filter unless the demodulated bandwidth is much less than the excitation frequency or a high order low-pass filter is used. However, these spurs can easily be removed with digital filters.
One of the simplest filters to implement is the moving average filter. For optimal effectiveness the signal must be digitized at an even multiple of the excitation frequency. The length of the moving average filter can be set to one or more excitation signal cycles. To get the best performance from the digital filter, the ADC should sample the ADA2200 coherently with the ADA2200 output sample rate.
Sigma delta ADCs perform this averaging function inherently by the nature of their design. These ADCs normally have a sinc3 or sinc4 transfer function with transfer function zeros at multiples of their output data rate. By synchronizing the ADC clock and the ADA2200 clock and setting the output data rate of the ADC to the excitation signal frequency, the spurs can be completely removed.
What is phase measurement noise?
Phase detection noise is simply the amount of uncertainty in the phase measurement once any offset errors are corrected.
How do I switch between 3 and 4 wire SPI?
The device will start from reset in 3-wire SPI mode. To change to 4-wire SPI mode, write 0x18 to register 0x0000. Then write 0x10 to register 0x002A. After these two register writes, the values of the registers can be read back to verify the operation was successful.
Can I use 4wire SPI and Demodulate?
Yes. However, you will need to generate a sensor excitation signal that is synchronous to the ADA2200 output sample clock at the frequency that corresponds to the center of the bandpass filter. The phase relationship of this signal will impact the output signal amplitude. It may helpful if the phase of this clock can be varied with respect to the ADA2200 CLKIN input in some applications, but will likely not be a requirement.
If I don’t need to run my ADA2200 at 500kHz, how can I expect the dc power to scale?
The ADA2200 current draw is composed of two main components, the amplifier bias currents and the switched capacitor currents. The amplifier currents are independent of clock frequency; the switched capacitor currents scale in direct proportion to the ADA2200 input sample clock.The figure below shows the measured typical current draw at supply voltages of 2.7 V and 3.3 V, as the input clock varies from 1 kHz to 1 MHz, with CLKIN DIV[2:0] = 1. With a 3.3 V supply voltage, the current draw can be estimated with the following equation:
IDD = 290 × 0.2 × fCLKIN µA
where fCLKIN is specified in kHz.
Typical Current Draw vs. CLKIN Frequency at VDD = 2.7 V and 3.3 V
How much power can I save at the component and system level using ADA2200?
The ADA2200 contains low power signal processing blocks. It can reduce system power consumption drastically in some cases. It accomplishes this by lowering the ADC sample rate which lowers the ADC power consumption along with the power consumption of the digital signal processing elements.
Can I drive an LED with RCLK?
The RCLK output of the ADA2200 can sink or source a minimum of 8mA, which is sufficient to drive most low power LEDs.
Can the outputs of the 2200 drive my ADC?
The ADA2200 outputs can drive most precision ADCs. Check the datasheet of the ADC in your application to verify the drive requirements.
Can I drive the inputs of the 2200 with a current-output sensor?
The input impedance of the ADA2200 is high and is inversely proportional to the input sample frequency. Whether or not buffering of the input signal is required will depend on the source impedance, signal level and sample rate of the ADA2200.
Perfectly clear . It wasn't clear that I could do that. Thanks so much and
for fast answer
Dan Linehan LIGHTWISE 0868369377
via Newton Mail
On Tue, Apr 24, 2018 at 5:53pm, brianharrington <
I am not sure I completely understand your system requirements, but let me make a couple of comments and see if it helps.
There are two things required to synchronize the RCLK outputs between multiple ADA2200 devices. First, the CLKIN pins should be driven from the same clock source. This will ensure that the RCLK outputs will have the same frequency (provided the clock dividers are programmed the same) and the phase relationship between devices will be stable. The second requirement is a synchronous reset of the ADA2200s. Because the CLKIN signal is divided to create the RCLK signal, the devices may power up with different phases of their dividers. By restting the ADA2200s at the same time, all of the ADA2200s dividers will produce outputs in phase with each other.
Does that answer the question?
Just to clarify, I envisage 16 ADA2200 synchronous demodulating receiver devices and I want to be able to freely configure them to detect synchronously with one of the five "externally generated" reference carriers .
thanks in advance
I have an AM, 16channel, application where I want to apply one of 5 synchronous ( & inharmonic) carriers to one or more of the transmitter channels and configure the system to demodulate the outputs of any (one of 16) receivers for any one of the above 5 carriers. I am considering using the ADA2200 to detect the signal amplitude but I cant see an easy way to synchronise the RCLK exciting signals. Is there a way of getting/forcing RCLK to sync across multiple ADA2200 devices - doing this with a pin rather than some kind of PLL .??
I am trying to reverse engineer a spinner magnetometer using the ADA2200 as a synchronous demodulator.. An archaeological sample containing geomagnetic materials is spun between two coils. A shaft encoder provides clock signal of 2048 pulses per revolution. plus and index signal once per revolution. Two counters are used to generate two square waves 90 degrees apart.to be used as CLKIN signals to the ADA2200s. The coil outputs (180 degrees out of phase) are fed to an AD8476 that will drive the ADA2200s. I would like to test the ADA2200 section of the design by using an audio generator and its sync output to feed the single ended input to the INP of the ADA2200 and CLKIN similar to the similar to the setup in Figure 2 setup in UG-702.An RC (low pass) filter in the INP path allows me to vary the signal frequency thereby changing the phase between the test signal and the CLKIN signal while keeping the amplitude constant (about 0.1 V P-P- for INP and CLKIN). Varying the phase (or the amplitude) while monitoring the signal(s) at P7 and P8 to ground with a DMM. These output signals don't seem to change regardless of input variations. The circuit I used is shown below. Any help you might be able to provide would be very much appreciated. You had provided me help on this project a while back and I am just getting to this stage now.
Thanks, Jack Ellis