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    • AD7091R IBIS Model LFSCP and MSOP
    • AD7091R IDRIVE current higher than 20uA
    • AD7091R Conversion Result Change
    • AD7091R MSB always 0 after each conversion
    • After powering up the AD7091R why does the conversion result change after approximately 60   samples have completed?
    • Are there ways to reduce the component count associated with a solution containing the      AD7091R-2/4/8?
    • Why after every conversion of AD7091R is the MSB of the conversion result always “0”?
    • AD7091R: VREF to power others parts of a circuit
    • Are there IBIS models available for the AD7091R LFCSP and MSOP package?
    • Why the AD7091R ,when I measure the Idrive current during operational mode do I get higher than the 20uA as quoted in the maximum rating in the data sheet?
    • AD7091R: Second /CONVST pulse occurs before the end of conversion point
    • AD7091r: Why when I measure the Idd current during operational mode do I get higher than the 554uA as quoted in the maximum rating in the data sheet?
    • AD7091: Can Vdrive be greater than Vdd
    • AD7091R SPI question
    • AD7091R Conversion Error After Exiting Power Down Mode
    • AD7091r
    • Do I need an external pull up resistor on the SDO pin if the Busy Indicator feature is not required?
    • If a second /CONVST pulse occurs before the end of conversion point, EOC, what will happen? Will the first request be cancelled and a new conversion begun?
    • Is it possible to get a PCB footprint for the AD7091?
    • Recommended ADC Driver for the AD7091R
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  • Programming FMC FRU ID EEPROM on Linux

AD7091R SPI question

Q 

We are planning to use the AD7091R in a mobile low power distance measurement
device. We need a data throughput of 1MSMP/S. My question is if it is possible
to readout the data by SPI during a conversion. At the datasheets there are
only examples in which the data a readout by SPI after a conversion. This means
that I need a very high SPI clock when I want to use the ADC at 1MSPS.

 

A 

After testing an eval board, the answer to the question is yes. In fact this is
how it's done on the SDZ eval board as the SDP is limited with maximum clock
speed.

The caveat here is that tQUIET of 50ns min is violated when doing this. The
part was never evaluated/tested for this condition, and we can't guarantee
specified performance when running the part in this manner.

It is also essential that any reading of data from the SDO line is completed
before EOC. The output register is updated with the next result at EOC.

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