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AD7398: Usage of LDAC pins

I am a little confused over the use of the LDAC control pin on the AD7398. How
do I go about updating all four DACs simultaneously?


The idea behind the LDAC- control pin has to do with the double buffered input
structure. Double buffered means that there are two layers of registers: Input
registes and DAC registes. You write to the input register. The DAC register
directly controls the analogue output. So once you have written to the input
register you use the LDAC- signal to transfer the new data from the input
register to the DAC register, thus updating the Analogue output.

While LDAC- is held high, you can write to the input registers "in your own
time" without changing the values held in the DAC registers, therefore the
Analog outputs do not change when the part is written to. Then, at a later time
you can update the DAC register, and the Analogue Output to the new value, by
pulling the LDAC- input low. While the LDAC- input is low, the DAC register is
equal to the input register. In effect, the DAC register is transparent, as
described by Table 1 on page 6 of the datasheet. When LDAC- returns high,
changes to the input register will again have no effect on the DAC register,
therefore the rising edge is the critical edge, because the data present at the
time this edge occurs is the data which will remain in the DAC register until
the next LDAC- update.

The LDAC- pin is most useful in a multiple DAC, like the AD7398, where several
DACs can be written to over the same interface. Clearly, you can only write to
one DAC at a time, yet you may wish all the DAC outputs to be updated at the
same instant in time. By keeping the LDAC- pin high during the writes, you can
write to each DAC input register in turn without changing the Analogue output.
Then, once all the input registers have been written to, you strobe LDAC- low
and the DACs are all updated simultaneously.

On the AD7398, the LDAC- input is level sensitive. If you were to tie LDAC low
permanently, then the values in the DACs would be updated on completion of the
serial write operation, since the DAC register is transparent in this case.