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I have a query regarding sampling an AD7714 ADC. I have three differential inputs and wish to sample these sequentially. My routines at the moment follow the flowchart on page 30 of the datasheet - but I perform 3 calibrations (each with different gains) followed by polling each input in turn. I am finding that occasionally, the data read and stored from Channel 1 is the value I would expect from Channel 2. I am also finding that the gain settings are resetting to G=1. Can you offer any assistance? Should I write to the mode register before polling DRDY (I am reading the comms register for this) Do I need to introduce any delays into my code?
According to the datasheeet, if a change of channel takes place, the settling time is 3 x 1(output data rate) regardless of the /SYNC or FSYNC status as the part issues an internal /SYNC command when requested to change channels. However there is a known problem when continually switching between channels, an incorrect reading is obtained randomly from the selected channel. Problem is caused by the internal SYNC which is not issued to the part following a channel change. The result is that the ctm gets results that are not fully settled. There is a software fix that can be put in place to resolve this problem. When switching channels use the FSYNC bit in the MODE register. Write a 1 to this bit before changing channels then write a 0 to this bit after the channel change has been implemented. The sequence of events in your read program are as follows: 1)Write to the comms register, selecting the mode register. 2)Write to the mode register setting FSYNC high and channel gain(when this bit is high, the nodes of the digital filter, the filter control logic and the calibration control logic are held in a reset state).. 3)write to the comms register, selecting the channel and a write to the mode register. 4)write to the mode register setting FSYNC low and channel gain( when the FSYNC bit goes low, the modulator and filter start to process data and a valid word is available in 3 x 1(output update rate) i.e.,the settling time of the filter) 5)Poll the DRDY output. 6)Write to the comms register to select a read operation of the data register. 7)Read the data from the data register.