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CMRR and PSRR parameter interpretation

Our application is sensitive to offset voltage to keep leakage current
measurement dynamics as high as possible. AD7788 specifies typ.<3uV offset
but not input voltage, at which is measured. Could you specify it? If input
offset is say 3uV is tested at 0V common mode, should I expect, that it could
be more than 30uV at 1.2V common mode due to CMRR of 90dB? Similar to PSRR.
Does 90dB CMRR@DC and PSRR mean, that chopping technique is not able to
suppress offset (at zero input differential voltage) below say 10uV?


The offset is measured with an external short which is biased at AVDD/2. The
CMRR is measured with a differential voltage of 1V between AIN+ and AIN-. We
would expect the offset to be 3 uV typically at the higher common mode voltage
also. We would not expect it to degrade to 30 uV. If the input leakage current
of the device is also important, using a buffered part such as the AD7790 leads
to better leakage current compared with an unbuffered part.