Search FAQs on the left to see if your question has been answered. Click on the dropdown to view all of the documents associated with the product. If you can't find your question, click on Ask a Question

AD7799: SPI issue

My customer has problems with the SPI interface of the AD7799.  When he wants
to read out e.g. the status register, he gets as a response two bytes with the
value "0". The schematic was checked two times, so we are quite sure that there
might be a configuration problem of the SPI interface.

Furthermore, is it possible that CS/ is high between two conversions?


When the device is powered up and the power supply has settled, 32 1s should be
written to the device.  This will reset all registers to their default values. 
When CS is low, you should see the DRDY line pulsing at 16.7Hz.  As Brigid-Anne
suggested, the customer should then try to read one of the registers.  Can you
confirm that the customer is writing to the communications register to inform
the AD7799 that a read of one of the on-chip registers is being requested. 
After writing this instruction, the customer should then apply the correct
number of SCLK pulses to the part.  The register value will be placed on the
DOUT line.

Is the customer bit-banging a port or is a dedicated serial interface being
used.  If bit-banging, the customer should check the signals to ensure that the
correct number of SCLK pulses is being applied to the AD7799 during the read
and write operations.

As Brigid-Anne suggested, DIN should be pulled high when it is not being used. 
Also, SCLK should idle high between read and write operations.  Can you also
ask the customer to check the SPI pins to ensure that there is no large
glitches appearing as the AD7799 may see these as SCLK pulses.

There are no known issues with the serial interface.  Usually, problems are due
to incorrect number of SCLK pulses or noise on the SPI lines. 

Yes - CS can be taken high between conversion start and data read.  After
initiating the single conversion, CS can be taken high.  The ADC will continue
the conversion and return to powerdown mode after the conversion is completed. 
Since CS is high, the DRDY pin is tri-stated so it will not indicate when the
conversion is complete.  To initiate a single conversion, code 08 hex is
written to the AD7799.  This informs the AD7799 that a word is being written to
the Mode Register.  The value written to the Mode register is 200A hex (A is
the update rate).  When the conversion is complete, the value 58 hex is written
to the AD7799.  The customer can then apply 24 SCLK pulses to the AD7799 and
the 24-bit conversion is placed on the DOUT line.

There is no special power up sequence after power up.  The customer should
write 32 1s to the device to reset the registers.  The user can then configure
the part for their application i.e. channel, update rate, gain, etc.  However,
the power supplies must have powered up and settled and the uC should also have
powered up and settled before the 32 1s are written as any 'invalid' data which
may be present on the uC's  SPI pins during power up may corrupt the AD7799's

The on-chip oscillator only takes a few ms to power up and settle. 

So, can you ask the customer to reset the device after power up and check the
DRDY line (CS needs to be low) to see if it is pulsing at 16.7Hz.

Check whether a dedicated serial interface is being used or whether bit-banging
is being used.

Confirm that there is no glitches on the SPI lines which could be causing the