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How comes we must absolutly validate the clock after the bias when PD is to be non valid (put to Vcc). Is there a special way to connect PD to 1 (power down not used)
If the power down feature is not used, tie the /PD pin directly to Vcc. You still need to take into account the power times when the part is first turned on as described on datasheet page 10. You must allow 25us after power up before the first conversion is initiated.
"the first conversion is initiated." Does the AD 7825 power down if ~CONVST is low after ~EOC check even if ~PD is always high?