Q
If CONVST pin is pulled to high by resistor, is there any selfcalibration
active at power up? The DSP starts some 100 msec after power up with cyclic
access to the ADC control register to initiate conversions (rate 40kHz).
A
The first CONVST applied after power-up starts a self-calibration sequence. If
you pull CONVST high then self calibration sequence will not be initiated.
See also the datasheet section on power up time:
When AVDD and DVDD are powered up, the AD7859/AD7859L enters a mode whereby the
CONVST signal initiates a timeout followed by a self-calibration. The total
time taken for this timeout and calibration is approximately 70 ms —see
Calibration on Power-Up in the calibration section of this data sheet. During
power-up the functionality of the SLEEP pin is disabled, i.e., the part will
not power down until the end of the calibration if SLEEP is tied logic low. The
power-up calibration mode can be disabled if the user writes to the control
register before a CONVST signal is applied. If the time out and
self-calibration are disabled, then the user must take into account the time
required by the AD7859/AD7859L to power up before a selfcalibration is carried
out. This power-up time is the time taken for the AD7859/AD7859L to power up
when power is first applied (300 ms typ) or the time it takes the external
reference to settle to the 12-bit level—whichever is the longer.