- Using the same ADC power mode, filter setting, and decimation rate, the ADAQ7768-1 has a slightly different amount of noise with a different MCLK. This is due to the core ADC having a higher noise spectral density (NSD) with lower MCLKs, while the analog front-end (AFE) NSD remains constant.
- In the ADAQ7768-1 datasheet, the “Noise Performance and Resolution” section lists down the noise performance of the device across varying MCLK frequencies, filter settings, and decimation rates.
- If the MCLK used is not in the table, the noise can be calculated as below:
- Calculate the core ADC’s NSD (NSDADC) at the operating MCLK frequency (MCLKOP) using the formula:
- Root-sum-square the NSD of the core ADC and the AFE to get the total NSD. Use the NSDAFE from the table.
RTO NSDAFE (nV/rtHz)
Gain0
23.1
Gain1
25.7
Gain2
31.2
Gain3
37.7
Gain4
55.1
Gain5
91.4
Gain6
172.5
- The total RTO noise is:
where VN_RTO = referred to output RMS noise in Vrms
BW = effective noise bandwidth in Hz - For example, using MCLK = 12.288MHz, MCLK_DIV = 2, Filter = Wideband Low Ripple, DEC_RATE = 128, leads to a:
- BW = 20.8kHz
- RTO Total NSD = 49 nV/rtHz
- RTO Total Noise = 7.07 uVrms
- Calculate the core ADC’s NSD (NSDADC) at the operating MCLK frequency (MCLKOP) using the formula: