AD7731: PCB join analog and digital ground planes

Question I am designing a PCB with 7 (seven!) AD7731 a/d chips and am not sure which is the best point or points to join analogue and digital ground planes. Is it:- a) one join at the 4th 7731 ? b) 7 seperate joins at each 7731 ? c) another way ? Answer The pin marked DGND on the AD7731 is the return path for the digital current out of the AD7731. It does not necessarily mean that this pin should be connected to the digital ground plane of your system. Connect the AGND pin and the DGND pins of each individual IC together with a broad, low inductance track. You can now treat each of these seven nodes as a single analog ground connection to be routed onto your system analog ground plane. You should provide a separate ground return path back to the power supply for each converter in the system. If each AD7730 has 7mA of analog current and 1mA digital, providing separate return paths means that there is only ever 1mA digital current in each converters local ground plane. You can do this by flooding the analog ground plane and sectioning it off with cuts to provide a local ground return path for each converter. The digital current from the AD7731 is relatively small in comparison to the analog current and provided you use low inductance ground paths this small amount of digital current should not adversely affect the noise floor. You should ensure that AVDD is decoupled to AGND and DVDD is decoupled to DGND. The system analog ground plane should be kept separate from the system digital ground plane, which routes the return current for the "spikey", digital components such as micro-controller, digital buffers, logic etc. The connection between the system digital ground and system analog ground should be made at a single point (commonly referred to as the "star point"). Where you place the star point will depend on your system but this is often determined by the power supply you use. The single connection between analog and digital ground is already made at the power supply. Your job as a designer is to ensure that no digital current is allowed to flow in the analog ground plane while ensuring that the potential of the analog and digital grounds in your system remain equal. The final chapter in all our seminar books is dedicated to hardware design techniques and deals with such issues as grounding, decoupling, parasitic thermocouples and good PCB design. http://www.analog.com/support/standard_linear/seminar_material/index.html

AD7731: Continuous Read Mode and Conversion Mode

Question In our application the AD7731 does not stop "continuous conversion mode". Is it enough to write a 1/1 to RW1/RW2 into communication register? (The RDY_ pin signals a valid results always after 1,6ms(600Hz) - like during continuous conversion mode) Does "stop continuous read mode" and "stop continuous conversion mode" mean the same? Does AD7731 maybe make one more conversion after stopping it? Do I may have to reset the AD7731 to stop it? Answer The AD7731 "Continuous Read Mode" and "Continuous Conversion Mode" are two different things. The continuous READ mode ======================== is related to the digital interface. In this mode, the interface doesn't need to write to the communication register again and again, for repeatedly reading the same register. That could be for example the data register - to only read data once the part was calibrated and configured to desired mode of operation, or could be reading the status register, where due to limited number of wires the RDY pin is not used. To start and stop continuous read mode, write the appropriate value to the RW1/RW0 bits in the AD7731 communication register. (Datasheet page 13.) The continuous CONVERSION mode ============================== is related to the ADC converter itself and means that the new conversion is started automatically and immediately after the previous has been finished. The RDY pin goes low when the new result is ready for reading. The RDY goes high when the data are read. In case the data are not read during the whole next conversion period, the RDY would go high for a short time just prior the end of conversion to make sure that there is the high to low transition flagging the end of each conversion. To start and stop the continuous conversion mode, write the appropriate value to the MD2/MD1/MD0 bits in the mode register. (Datasheet page 15.)

AD7731: Sinking Current

Q 1 - I cannot see, from the documentation, what is the maximum supply/sinking current on the digital pins (DIN, DOUT, SCK...) of the circuit. I wish to interface the AD7731 to th microcontroller board/bus with optocouplers, but I do not know if the AD can handle driving their LEDs directly. 2 - For another circuit, an weighing application, I have a bridge that has a full-scale output of 2 mV. Having tested it, there is too much noise. So, I need to amplify the signal., and I thought of using an Instrumentation Amplifier. The AD623 seems a good choice. (Not too much noise, and single supply). But the problem is, the output (reference) of the In-Amp is referred to ground, and I need to refer it to a higher voltage, because of the limits of the AD7731. I suppose I cannot connect it directly and only to the input of the converter, because it needs a low impedance circuit. I thought I could connect the reference to the AD780 (2.5 V), and these to the input, but I do not know if this can be done, or what it means in terms of accuracy (and safety) to the AD780 or the rest of the circuit. I need to extract 18 bit accurate accurate data, so noise is a concern here. A 1 - The digital outputs are not tested for their maximum source / sink capabilities. Digital outputs in general are specified to guarantee particular voltage high and low levels for a given source / sink current. In the case of the AD7731 voltage outputs, we guarantee valid logic high levels which the output is sourcing 200uA (5V supply) or 100uA (3V supply), we guarantee valid logic low levels when the output is sinking 800uA (5V) or 100uA (3V). If you require the outputs to sink and source more current than is quoted, the output levels cannot be guaranteed and the outputs should be buffered. In general, I would expect that digital outputs of the AD7731 cannot drive the diodes directly and you should include a buffer. Also note that the output of a opto-isolator generally has a very slow rise and fall time and a Schmitt trigger will often be required to make the logic transitions sharper. Only the SCLK input on the AD7731 includes a Schmitt trigger on the input. 2 - The output of the AD623 can be referenced to any voltage within supply range using the REF pin. It is quite acceptable to connect REF to the AD780 2.5V reference. However, it will be very difficult / impossible to achieve 18 bit resolution from a 2mV full-scale signal, using the AD623 to amplify the signal. To achieve 18 bit resolution from a 2mV full-scale, 1LSB is 7.6nV. To achieve 18 bit resolution from the AD7730 you need to gain up the input to the +/-80mV range (gain of 160). The AD623 has an input referred noise of 35nV/rt(Hz), therefore in a 3Hz bandwidth the 60nV. The AD620 has significantly lower noise at 9nV/rt(Hz) but it needs dual supplies. Remember also that the Johnson noise of a 1k resistor is 4nV/rt(Hz)!

On the datasheet I get the impression that the 'CHOP' variable affects the output rate of the sinc3 filter, and therefore the frequency response.

Q 1) On the datasheet I get the impression that the 'CHOP' variable affects the output rate of the sinc3 filter, and therefore the frequency response. So if SF = 512 and CHOP = 0, the response is as it is in the datasheet, but then setting CHOP = 1, will it not stretch the response out such that the first node is at 200Hz. I ask this because the excel model of this filter, which you provide on your website, the sinc3 filter seems to be unaffected by the value of CHOP. 2) For the calculation of the sinc3 output, the formula that you have used is a bit different than what I'd expect 3) How would I go about modelling the sinc3 filter in Simulink? 4) Is there any chance you could provide me with the FIR filter coefficients? A 1)When chop is off and the FIR filter is not used, the AD7731 does the inversions needed for chopping. However, it does not do the averaging. You must take 2 subsequent conversions and average them. The excel model shows the frequency response before this averaging. However, the averaging that the customer performs will change the filter response. The averaging will introduce first order notches at half the output data rate and at odd integer multiples of half the output data rate. For example, with chop off, FIR filter not used, the output data rate is 600 Hz i.e. the sinc3 filter is used and is free running. With chop on and the FIR filter still bypassed, the output data rate is reduced by a factor of 3. This is because the sinc3 filter has a settling time of 3 conversions. So, with the analog inputs connected in one direction, a conversion is generated. The analog inputs are then swapped and another conversion is generated. These 2 conversions then need to be averaged by the customer to remove the offset. With chop on, the output data rate is 200 Hz. Therefore, the averaging will introduce notches at 100 Hz, 300 Hz, 500 Hz, etc. 2)The output data rate is listed in the datasheet. The modulator operates at MCLK/16. So, for a 4.9152MHz clock, the modulator operates at 307.2 kHz. The output data rate is fmod/SF when chop is off and the sinc3 filter only is used. So, when SF=512, the output data rate equals 307.2kHz/512 = 600 Hz. When chopping is enabled, the output data rate is reduced by a factor of 3. So, for the above conditions, the output data rate is 600/3 = 200 Hz. The excel model is correct. 3)The sinc3 filter is a standard sinc3 filter. 4)The FIR coefficients are the same for chop off and chop on.

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