AD7790: Shift signals

Question Sensor output is amplified so that signal lies between -3 and +3 V. System voltage is 3 V, -3V available from a voltage converter. Is it possible in some way to use the AD7790 as ADC in that case? What other possibilities are there to convert the -3 to +3 V signal? Need a low-power solution. Answer 1. Use a Low-power op amp to shift and attenuate the input signal so that the +/-3V signal range becomes a 1.5V +/-1.5V signal range. Power the AD7790 from +3V supply (converter GND connected to system ground) and use the AD7790 in unbuffered mode which gives a rail to rail input swing. Disadvantages => external op amp adds power and noise. You can also achieve a similar effect by simply using an external resistor network (see our AD7707 and AD7732) to attenuate and level-shift the signal so that it will fit into the ADCs input range when the ADC is powered from 0 to +3V supplies. 2. Power the AD7790 from the +/-3V supplies (and level shift the digital control signals so that they are referred to -3V instead of ground. Then you can drive the AD7790 directly with a +/-3V signal and supply the AD7790 with a +/-3V reference (if the supply is ow enough noise) Otherwise you can attenuate the input signal to e.g. +/-2.5V which gives you the possibility of supplying the reference from +/-2.5V voltge reference ICs. And then use the converter in buffered mode (to get around the added input impedance from the resistive divider.

I am using an AD7790 adc for the analog input stage after an instrumentation amplifier. It is used for a digital sensor.

Q I am using an AD7790 adc for the analog input stage after an instrumentation amplifier. It is used for a digital sensor. Please write your questions or comments here: Our design now basically works okay but sometimes after powerup we get totally incorrect values from the ADC (one constant value, upper or lower bound). After power cycling the target a few times the results are correct (there are no changes in the software). On powerup the software currently only performs a reset of the adc (32 continous 1s) and then starts to read its values. Are there any special considerations to take care of during powerup? A Your information below implies that you are using the default values of the internal registers in the AD7790.I would expect that after power on, the serial interface is RESET and expects to see a write to its communication register,in default conditions, the device is placed in continuous conversion mode, so you should see the RDY cycling low at the default datarate. Otherwise, here are a few notes which may help in solving the issue. The SPI interface can be particularly sensitive to interfering noise. The most likely reason for reading incorrect data from the AD7790 registers is an extra spurious (extra) clock pulse appearing on the SCLK line. The CS line does synchronise the writing of data, but if an incorrect number of data bits are written then the interface could get confused, and will not recover when the next time CS is asserted. The way to reset the interface when communication has been lost is to take Din high and put in 32 SCLK cycles to the part. If you have established proper communication between the AD7793 and your micro, you should be able to read back the contents of the registers that you have programmed. Is that possible? If you cannot, then you will need to verify your code by connecting a scope to SCLK, DIN of the ADC to verify that the correct information is being sent to the ADC as per fig 3 and fig4. Try putting a small value cap from the SCLK pin to AGND. If a capacitor on the SCLK fixes the problem, then it is likely that you have excess noise on your board. The transistors that make up the serial interface are actually quite fast and can react to high frequency noise/interference. Noise - If the SCLK is very noisy and has multiple transistions on each clock edge, then the same databit will be input or output several times which will cause the ADC and the controller to lose synchronisation. The capacitor ( possible 15 to 30Pf) isn't a very satisfactory solution. Better solution is to solve the noise problem. Overshoot/ringing - If the clock edges are very fast, and the SCLK line is quite long then you can get overshoot/ringing, reflections, etc causing false transitions on the line. A little extra capacitance can help to lower the bandwidth of the line, but again this is not an idea solution. Series resistor is a better solution.

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The AD7790/AD7791 are low-power, complete analog front ends for low frequency measurement applications. The device consumes 65 ÂµA of current typically...
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