AD7859: Powering the device

Question I need to convert an analog signal (sine) with range (0.6V to 4.6V). Is it possible to supply the analog power of the AD7859 with +5V and the digital power of the AD7859 with +3.3V (in order to be compliant with input/output DSP signal level) ? Answer By using an external 4V reference and powering the device for a +5V supply you will be able to measure a voltage range from 0.6V to 4.6V. However, the absolute maximum ratings state that AVDD and DVDD must be within 0.3V of each other, so you must power the digital side from +5V also. You can then level shift the 5V logic signals using external circuitry between the AD7859 and the DSP.

AD7859: Power up sequence

Question If CONVST pin is pulled to high by resistor, is there any selfcalibration active at power up? The DSP starts some 100 msec after power up with cyclic access to the ADC control register to initiate conversions (rate 40kHz). Answer The first CONVST applied after power-up starts a self-calibration sequence. If you pull CONVST high then self calibration sequence will not be initiated. See also the datasheet section on power up time: When AVDD and DVDD are powered up, the AD7859/AD7859L enters a mode whereby the CONVST signal initiates a timeout followed by a self-calibration. The total time taken for this timeout and calibration is approximately 70 ms —see Calibration on Power-Up in the calibration section of this data sheet. During power-up the functionality of the SLEEP pin is disabled, i.e., the part will not power down until the end of the calibration if SLEEP is tied logic low. The power-up calibration mode can be disabled if the user writes to the control register before a CONVST signal is applied. If the time out and self-calibration are disabled, then the user must take into account the time required by the AD7859/AD7859L to power up before a selfcalibration is carried out. This power-up time is the time taken for the AD7859/AD7859L to power up when power is first applied (300 ms typ) or the time it takes the external reference to settle to the 12-bit level—whichever is the longer.

Q In some cases (about 1%) device doesn't function properly after power-up. external sleep / calibration doesn't help. there seem to be 2 error modes - 1. getting very high readings from all channels regardless of the analog inputs. 2. strange readings, there's some correlation to analog inputs (i.e ch1 affects ch3, etc..) but readings are wrong. do u have any ideas of what the problem might be? are there any "frequently done errors" ? could something happen during FPGA config were DIOs are unstable that put the device in such state? t A Check on power up that the power (Avdd and Dvdd) is applied and fully settled before signals at REF IN ,AIN, or the logic input pins are applied in order to avoid excessive current. Here are some ap-notes relating to the AD7859: 1) You cannot change channels and initiate a conversion on the new channel in the same write cycle. If you use the CONVST bit to initiate conversions, you need 1 write cycle to set the channel select bits and a second write to the control register to initiate a conversion on the newly selected channel. (If you do change the channel select bits and set the CONVST bit with the same write to the control register, the AD7859 will convert on the previously selected channel and only then change the input channel) 2)Finally, a datasheet omission that was noticed by another customer : Q) When using the AD7859 in byte-transfer mode, i.e. W/_B pin tied low, and using DB8/HBEN as low/high byte selecting pin, what is recommended for the unused DB9-DB15 pins ? Should they be left open, tied to GND or to Vcc ? A) These output pins should be tied to DVDD via 100 kΩ resistors when the AD7854/AD7854L is being interfaced to an 8-bit data bus.