Continuous read - start and read sequence

Question I am trying to communicate with it in 3 wire spi mode from a micorcontroller running at 16MHz. I am using the hardware SPI to communicate with the AD7788. My SPI clokc is running at 500KHz I am specifically trying to use the continuous read mode ( and continuous converision mode) on page 16 of datasheet. The step I go through are :- 1. Pull CS low to enable the ADC 2. Write 0x10 to the communications register to select the mode register on the next write. 3. Write 0x06 to mode register to select unipolar mode 4. Write 0x3c to the communications register to select continuous read mode 5. Wait for falling edge of DOUT/DRDY 6. Clock out 16 bytes split into two 8 bit transactions, DIN held low during clock activity 7. Go to 5. I understand the expected behavoir of DOUT/DRDY is that it goes low to indicate a conversion is ready and return to high while the ADC is busy. I can confirm this if I simply pull CS low and observe the on the scope. It shows pulses at 16.6Hz as expected. However if I go through the above steps after sending the continuous read command the DOUT/DRDY output is just pulled low and never returns high. If I wait for the next falling edge of DOUT/DRDY this never occurs. Answer Perform a reset operation of the AD7788 after startup by applying 32 clocks of DIN high then all access to all the registers and continuous read mode should work as expected.

AD7788: Using it with low Vref

Question His question is on the specs in the datasheet: There is a Reference Voltage Range specified, from 0.1V to Vdd. 1) Do you have any datas or an idea on the performance loss (missing codes) when he decreases the REFIN from the specified 2.5V to low ranges of e.g 0.1 to 0.2 V ? 2) Does it influence the measurement if he sets his reference on REFIN(+) = 4.2 and REFIN(-) = 4 V or on 1.2V and 1.0V respectively? Answer 1) With a 0.1V or 0.2V reference, the rms noise from the part remains unchanged. However, the LSB size is now smaller so the p-p noise will degrade. For example, when Vref = 2.5V, the rms noise is 1.5 uV and the p-p resolution is 19 bits. So, with Vref = 0.2V, the p-p resolution will be 15.5 bits. With a 0.1V reference, the p-p resolution will be 14.5 bits. 2) Having the reference biased about 4V is fine. The difference between REFIN(+) and REFIN(-) will be 0.1V or 0.2V. The reference pins have good common mode rejection.

CMRR and PSRR parameter interpretation

Question Our application is sensitive to offset voltage to keep leakage current measurement dynamics as high as possible. AD7788 specifies typ.<3uV offset but not input voltage, at which is measured. Could you specify it? If input offset is say 3uV is tested at 0V common mode, should I expect, that it could be more than 30uV at 1.2V common mode due to CMRR of 90dB? Similar to PSRR. Does 90dB CMRR@DC and PSRR mean, that chopping technique is not able to suppress offset (at zero input differential voltage) below say 10uV? Answer The offset is measured with an external short which is biased at AVDD/2. The CMRR is measured with a differential voltage of 1V between AIN+ and AIN-. We would expect the offset to be 3 uV typically at the higher common mode voltage also. We would not expect it to degrade to 30 uV. If the input leakage current of the device is also important, using a buffered part such as the AD7790 leads to better leakage current compared with an unbuffered part.

From the specified common mode range it should be possible to operate the AD7788/90 on Vdd = +5V as follows:

Q From the specified common mode range it should be possible to operate the AD7788/90 on Vdd = +5V as follows: REFIN- connected to GND, REFIN+ conneceted to VDD/2. AIN- is connected to GND, AIN+ is the input for a voltage derived from Vdd by a variable resistive divider, and is in the range of 0V...+5V. If the input overloaded? Do we have to expect restrictions on accuracy from the offset? If yes, by what degree and above/below of which limits? A The inputs of these devices are DIFFERENTIAL. If you ground AIN- then you can only use the positive half-scale at unity gain since AIN+ may not be more than 30mV below the negative rail - and Vin(max) will be +2.5 V and you will lose the lower half of the 5 V span. If you want a 0-5 V span you must bias AIN- to +2.5V and apply 0 - +5 V to AIN+. The offset of these devices is 3 uV so should not be a problem.

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The AD7788/AD7789 are low power, low noise, analog front ends for low frequency measurement applications. The AD7789 contains a low noise, 24-bit, âˆ‘...
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AD7788: FAQ

Q: From the specified common mode range it should be possible to operate the AD7788/90 on Vdd = +5V as follows:

Q From the specified common mode range it should be possible to operate the AD7788/90 on Vdd = +5V as follows: REFIN- connected to GND, REFIN+ conneceted to VDD/2. AIN- is connected to GND, AIN+ is the input for a voltage derived from Vdd by a variable resistive divider, and is in the range of 0V...+5V. If the input overloaded? Do we have to expect restrictions on accuracy from the offset? If yes, by what degree and above/below of which limits? A The inputs of these devices are DIFFERENTIAL. If you ground AIN- then you can only use the positive half-scale at unity gain since AIN+ may not be more than 30mV below the negative rail - and Vin(max) will be +2.5 V and you will lose the lower half of the 5 V span. If you want a 0-5 V span you must bias AIN- to +2.5V and apply 0 - +5 V to AIN+. The offset of these devices is 3 uV so should not be a problem.