Q In AD7323's datasheet, it says if the input is single-ended, then no missing code is 11-bit plus sign bit. I am not sure what the meaning is. My question is: 1. If the Input Range is 0~+10V and the coding is twos Complement, then when the input is 0V, what's the sign bit, and what's the other 12 bit should be? Also when the input is +10V, what's the sign bit and the other 12 bit? 2. If the Input Range is -10V~+10V and the coding is twos Complement, then when the input is -10V, what's the sign bit, and what's the other 12 bit should be? Also when the input is +10V, what's the sign bit and the other 12 bit? A When the AD7323 is configured for differential mode (driven with 2 signals of equal amplitude that are 180 deg out of phase) then the AD7323 guarantees 13 bits NMC. When the inputs are configured as SE then the AD7323 only guarantees 12 bits NMC. In SE mode the part will out put 13 bits but we only guarantee 12 of these. 1. For 0 to 10 V range – 2s comp output coding - 0V input will be 1 0000 0000 0000; 10 V input 0 1111 1111 1111. 2. For the |+/- 10 V range 2s comp output coding - -10V input will be 1 0000 0000 0000; +10 V input 0 1111 1111 1111. Attachments:

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AD7323 Production
The AD7323 is a 4-channel, 12-bit plus sign successive approximation analog-to-digital converter (ADC) designed on the iCMOSâ„¢ (industrial CMOS) process...
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AD7323 on Analog.com