AD7091R-4 Busy Timing: Minimum Assert Time of Busy Pulse from CNVST falling edge?

I was wondering what the min delay is from convert start assertion to busy assertion? I know it's open drain at the output, so there's a time constant on what we will see for a max, but is there any spec of the min? Couldn't find one in the datasheet. Thanks! You can use this as your reference for the minimum time when the CNVST and BUSY pins toggle. This scope shot was based on its datasheet. Vil = 0.3xVdrive and Voh = Vdrive - 0.2. This will give you a 10 ns time difference. I hope this will help you.

Recommended ADC Driver for the AD7091R

Q What is the recommended ADC driver for the AD7091R? A The AD8031 is a good fit for the AD7091R as a driver amplifier. The AD8031 draws typically 750uA of current and can operate from 2.7V to 12V with fast settling times to allow for 1 MSPS sampling rate. The Cftl CN0247 can be viewed at the following location: http://www.analog.com/en/circuits-from-the-lab/CN0247/vc.html This is a reference design showing performance with the AD7091R and the AD8031. The evaluation board EVAL-AD7091RSDZ also has this combination on board for evaluation.

Q Can the ADC inputs exceed the reference voltage or go below ground? A The ADC inputs should not exceed the reference voltage or go below ground by more than 0.3V as this may result in the ADC being damaged. If this is a common condition then schottky diodes should be used to protect the inputs and limit them to <0.3V. The maximum input current to the analog input is +/-10mA.

AD7091R: VREF to power others parts of a circuit

Q Can I use the reference output on the AD7091R as the reference for other parts of my circuit? A Figure 14 in the data sheet shows the reference output voltage under various load conditions and temperatures. The reference voltage reduces with increasing load so it would be recommended to buffer the REFout voltage externally before using it externally.

Why after every conversion of AD7091R is the MSB of the conversion result always “0”?

If the communication timing is ok this is usually due to the time between the /CONVST start pulse going low and reading back the conversion. The conversion time is 650ns maximum. If the result is read back before this time has elapsed then it is possible that the MSB will be zero. You can also use the BUSY indication feature to indicate when a conversion is complete by having /CS low prior to the EOC point. This will take the SDO line out of high impedance once a conversion completes and this can be detected by the SPI master.

AD7091R Conversion Error After Exiting Power Down Mode

Q After exiting power down mode the conversion result is incorrect? A There are timing specifications to adhere to when exiting power down mode. The internal circuitry in the AD7091R takes 100us to power up from power down mode. This is the minimum time that must be maintained between exiting power down mode and starting the next conversion. Additionally if the on-chip reference is used it should be ensured that the external reference capacitor is charged to the correct potential to obtain a correct result. The time to recharge the reference capacitor is dependent on the charge remaining in the reference capacitor when the AD7091R exits power down mode.

Are there IBIS models available for the AD7091R LFCSP and MSOP package?

There is an IBIS model available for the AD7091R MSOP package that can be downloaded at the following link: http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7091r/products/tools-software-simulation-models/index.html The characteristics for the MSOP package and the LFCSP package should be similar so it is recommended to use this model in simulations for the LFCSP package.

After powering up the AD7091R why does the conversion result change after approximately 60 samples have completed?

After power-up ensure that the software reset as outlined in the data sheet is completed. A software reset initializes the AD7091R and ensures correct conversion results. The device will eventually initialize correctly after a certain number of conversions without a software reset but it is recommended for correct operation to always perform a software reset after a power cycle.

AD7091r: Why when I measure the Idd current during operational mode do I get higher than the 554uA as quoted in the maximum rating in the data sheet?

Q Why when I measure the Idd current during operational mode do I get higher than the 554uA as quoted in the maximum rating in the data sheet? A The conditions for Idd current measurements in the data sheet are for a Vin = 0V. This means that the output codes are all 0s. If the output codes are toggling the current required to change the state of the SDO pin is increased and therefore Idd current is increased. The worst case current will be when the conversion result is 101010… The current drawn in a particular application will also depend on the capacitive load on the SDO line.

Why the AD7091R ,when I measure the Idrive current during operational mode do I get higher than the 20uA as quoted in the maximum rating in the data sheet?

The conditions for Idrive current measurements in the data sheet are for a Vin = 0V. This means that the output codes are all 0s. If the output codes are toggling the current required to change the state of the SDO pin is increased and the Idrive current is increased. The worst case current will be when the conversion result is 101010. The current drawn in a particular application will also depend on the capacitive load on the SDO line.

Are there ways to reduce the component count associated with a solution containing the AD7091R-2/4/8?

Yes, an excellent solution is to take advantage of the Mux Out / ADC In feature that allows for a buffer amplifier at the output of the multiplexer instead of the traditional solution that may require a buffer per channel. The post-multiplexer buffer amplifier will reduce system power consumption, circuit area and component count.

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AD7091R-2 Production
The AD7091R-2 /Â AD7091R-4Â /Â AD7091R-8 family is a multichannel 12-bit, ultralow power, successive approximation analog-to-digital converter (ADC) that...
Datasheet
AD7091R-2 on Analog.com

AD7091R-8 Production
The AD7091R-2Â /Â AD7091R-4Â / AD7091R-8 family is a multichannel 12-bit, ultralow power, successive approximation analog-to-digital converter (ADC) that...
Datasheet
AD7091R-8 on Analog.com

AD7091R-4 Production
The AD7091R-2/AD7091R-4/AD7091R-8 family is a multichannel 12-bit, ultralow power, successive approximation analog-to-digital converter (ADC) that is available...
Datasheet
AD7091R-4 on Analog.com

AD7091R-5 Production
The AD7091R-5 is a 12-bit, multichannel, ultralow power, successive approximation analog-to-digital converter (ADC). The AD7091R-5 operates from a single...
Datasheet
AD7091R-5 on Analog.com

Table of Contents

+Documents
+General: FAQ
+AD1139: FAQ
+AD7091R Conversion Result Change
+AD1556: FAQ
+AD1580: FAQ
+AD1582: FAQ
+AD2S1200: FAQ
+AD2S1205: FAQ
+AD2S1210: FAQ
+AD2S75: FAQ
+AD2S80: FAQ
+AD2S80A: FAQ
+AD2S82A: FAQ
+AD2S83: FAQ
+AD2S90: FAQ
+AD2S99: FAQ
+AD4110-1: FAQ
+AD411x: FAQ
+AD5940: FAQ
+AD598: FAQ
+AD650: FAQ
+AD652: FAQ
+AD654: FAQ
+AD7091: FAQ
-AD7091R-X: FAQ
+AD711: FAQ
+AD7124-4: FAQ
+AD7124-8: FAQ
+AD7134: FAQ
+AD713: FAQ
+AD7142: FAQ
+AD7147: FAQ
+AD7148: FAQ
+AD7150: FAQ
+AD7151: FAQ
+AD7175-2: FAQ
+AD7176-2: FAQ
+AD7176: FAQ
+AD717x: FAQ
+AD7190: FAQ
+AD7192: FAQ
+AD7193: FAQ
+AD7195: FAQ
+AD719x: FAQ
+AD7265: FAQ
+AD7266: FAQ
+AD7280: FAQ
+AD7291: FAQ
+AD7298: FAQ
+AD7305: FAQ
+AD7321: FAQ
+AD7323: FAQ
+AD7328: FAQ
+AD7366-5: FAQ
+AD7367: FAQ
+AD736ARZ: FAQ
+AD737: FAQ
+AD738x : FAQ
+AD7398: FAQ
+AD7400A: FAQ
+AD7401: FAQ
+AD7403: FAQ
+AD74111: FAQ
+AD7415: FAQ
+AD7416: FAQ
+AD7417: FAQ
+AD7418: FAQ
+AD7450: FAQ
+AD7475: FAQ
+AD7484: FAQ
+AD7490: FAQ
+AD7492: FAQ
+AD75019: FAQ
+AD7503: FAQ
+AD7541A: FAQ
+AD7546: FAQ
AD7547: FAQ
+AD7568: FAQ
+AD7578: FAQ
+AD7606-4: FAQ
+AD7606: FAQ
+AD7606B: FAQ
+AD7606C: FAQ
+AD7608: FAQ
+AD7616 FAQ
+AD7616-P: FAQ
+AD7621: FAQ
+AD7625: FAQ
+AD7626: FAQ
+AD7631: FAQ
+AD7653: FAQ
+AD7654: FAQ
+AD7655: FAQ
+AD7656: FAQ
+AD7657-1: FAQ
+AD7663: FAQ
+AD7674: FAQ
+AD7675: FAQ
+AD7678: FAQ
+AD7682: FAQ
+AD7683: FAQ
+AD7684: FAQ
+AD7685: FAQ
+AD7688: FAQ
+AD7689: FAQ
+AD7690: FAQ
+AD7691: FAQ
+AD7705: FAQ
+AD7706: FAQ
+AD7707: FAQ
+AD7708: FAQ
+AD7709: FAQ
+AD7710: FAQ
+AD7711A: FAQ
+AD7712: FAQ
+AD7713: FAQ
+AD7714: FAQ
+AD7714YN: FAQ
+AD7715: FAQ
+AD7716: FAQ
+AD7718: FAQ
+AD7719: FAQ
+AD7720: FAQ
+AD7722: FAQ
+AD7725: FAQ
+AD7730: FAQ
+AD7731: FAQ
+AD7732: FAQ
+AD7738: FAQ
+AD7740: FAQ
+AD7741: FAQ
+AD7745: FAQ
+AD7746: FAQ
+AD7747: FAQ
+AD7760: FAQ
+AD7763: FAQ
+AD7766: FAQ
+AD7768: FAQ
+AD777x: FAQ
+AD7780: FAQ
+AD7785: FAQ
+AD7787: FAQ
+AD7788: FAQ
+AD7790: FAQ
+AD7792: FAQ
+AD7793: FAQ
+AD7794: FAQ
+AD7795: FAQ
+AD7798: FAQ
+AD7799: FAQ
+AD7805: FAQ
+AD7808: FAQ
+AD7809: FAQ
+AD780: FAQ
+AD7811: FAQ
+AD7812: FAQ
+AD7817: FAQ
+AD7819: FAQ
+AD7821: FAQ
+AD7825: FAQ
+AD7829: FAQ
+AD7835: FAQ
+AD7849: FAQ
+AD7851: FAQ
+AD7854: FAQ
+AD7856: FAQ
+AD7858: FAQ
+AD7859: FAQ
+AD7864: FAQ
+AD7865 : FAQ
+AD7872: FAQ
+AD7874: FAQ
+AD7879: FAQ
+AD7887: FAQ
+AD7888: FAQ
+AD7891-1: FAQ
+AD7891: FAQ
+AD7893-2: FAQ
+AD7895: FAQ
+AD7896: FAQ
+AD7899: FAQ
+AD7912: FAQ
+AD7921: FAQ
+AD7924: FAQ
+AD7927: FAQ
+AD7938: FAQ
+AD7942: FAQ
+AD7949: FAQ
+AD7960: FAQ
+AD7961: FAQ
+AD797: FAQ
+AD7980: FAQ
+AD7982: FAQ
+AD7984: FAQ
+AD7986: FAQ
+AD7988-1: FAQ
+AD7993: FAQ
+AD7994: FAQ
+AD7997: FAQ
+AD7998: FAQ
+ADA2200: FAQ
+ADAS1000: FAQ
+ADAS3022: FAQ
+ADAS3023: FAQ
+ADC: FAQ
+ADVFC32: FAQ
+EVAL-AD7719-EB: FAQ
+EVAL-ADAS3022EDZ: FAQ
+RDC1740: FAQ
+AD4030-24: FAQ
+AD4114: FAQ
+AD4116: FAQ
+AD4130-8 FAQ
+AD4131-8: FAQ
+AD4134 FAQ
+AD4170: FAQ
+AD4858
+AD674BBD: FAQ
+AD7172-2: FAQ
+AD7175-8: FAQ
+AD7191: FAQ
AD73360: FAQ
+AD73360AR: FAQ
+AD73360L: FAQ
+AD7357: FAQ
+AD7386-4: FAQ
+AD738x-4: FAQ
AD7398 SPI Voltage vs VCC
+AD7457: FAQ
+AD7606C-16: FAQ
+AD7609: FAQ
+AD7656-1: FAQ
AD7660: FAQ
+AD7665: FAQ
+AD7680: FAQ
+AD7686: FAQ
+AD7764: FAQ
+AD7778: FAQ
AD7892: FAQ
+AD7980SRMZ-EP: FAQ
+AD7991: FAQ
+AD9243: FAQ
+AD9260: FAQ
+AD9261: FAQ
+AD9262: FAQ
+AD974: FAQ
+AD976A: FAQ
+AD977A: FAQ
+ADAQ4003: FAQ
+ADAQ7768-1: FAQ
+ADAQ8092 FAQ
+DC590, DC2026, QuikEval: FAQs
+EVAL-AD7768-4FMCZ: FAQ
+Legacy LTC - Sigma Delta ADCs FAQ
+LTC2408: FAQ
+LTC2497: FAQ
+MAX1028: FAQ
+MAX1036: FAQ
+MAX1037EKA+: FAQ
+MAX11040GUU+: FAQ
+MAX11043: FAQ
+MAX11045: FAQ
+MAX11046 16-BIT AD: FAQ
+MAX11048: FAQ
+MAX11100EUB+: FAQ
+MAX11101: FAQ
+MAX11103: FAQ
+MAX11108: FAQ
MAX11125: FAQ
+MAX11125ATI+: FAQ
+MAX11130: FAQ
+MAX11131ATI+: FAQ
+MAX11136ATI+: FAQ
+MAX11150EVKIT#: FAQ
+MAX11154: FAQ
MAX11156: FAQ
+MAX11156ETC+: FAQ
+MAX11158: FAQ
+MAX11163: FAQ
+MAX11168EUB+: FAQ
+MAX11169EUB+: FAQ
+MAX11190: FAQ
+MAX11190ATE+: FAQ
MAX11192: FAQ
+MAX11192EVKIT#: FAQ
+MAX11200: FAQ
+MAX11200EEE+: FAQ
+MAX11201: FAQ
+MAX11203EEE+: FAQ
+MAX11206: FAQ
+MAX11207EEE+: FAQ
MAX11210: FAQ
+MAX11210EEE+: FAQ
+MAX11213EEE+T: FAQ
MAX11214: FAQ
MAX11214EUG+: FAQ
+MAX11214EUG+_T1: FAQ
+MAX11216: FAQ
+MAX11254ATJ+: FAQ
+MAX11254EVKIT#: FAQ
+MAX11259AWX+T: FAQ
+MAX11259PMB#: FAQ
+MAX11261BOB#: FAQ
+MAX11261ENX+: FAQ
+MAX11270EUG+: FAQ
+MAX11337ATJ+: FAQ
+MAX11410ATI+: FAQ
+MAX11608: FAQ
+MAX11609EEE+: FAQ
+MAX11612EUA+: FAQ
+MAX11612EVSYS: FAQ
+MAX11614EEE+: FAQ
+MAX11615EEE+C78: FAQ
+MAX11615EWE+: FAQ
+MAX11616EEE+: FAQ
+MAX11617EWE+: FAQ
+MAX11625: FAQ
+MAX11629EEE+: FAQ
+MAX11645EWC+T: FAQ
+MAX11647EUA+: FAQ
+MAX11900: FAQ
MAX11905: FAQ
+MAX11905EVKIT#: FAQ
+MAX1202AEAP+: FAQ
+MAX1220: FAQ
+MAX1229: FAQ
+MAX1230BCEG+: FAQ
+MAX1231AEEG+: FAQ
+MAX1239EEE+: FAQ
+MAX1239KEEE+: FAQ
+MAX1239LEEE+: FAQ
+MAX1258: FAQ
+MAX1271ACNG+: FAQ
MAX1300: FAQ
+MAX1300BEUG+: FAQ
+MAX1301AEUP+: FAQ
+MAX13171: FAQ
+MAX13204EALT+: FAQ
MAX1343: FAQ
+MAX1343BETX+: FAQ
+MAX13487: FAQ
+MAX13488: FAQ
+MAX1379ATP+: FAQ
+MAX1383: FAQ
+MAX1447ECJ+: FAQ
MAX14571: FAQ
+MAX14571EUD+: FAQ
MAX14574EWL+: FAQ
+MAX14574EWL+T: FAQ
+MAX14578: FAQ
+MAX14579EEVKIT#: FAQ
+MAX14588ETE+T: FAQ
+MAX145ACPA+: FAQ
+MAX1474: FAQ
+MAX14783: FAQ
+MAX14805: FAQ
+MAX14807ECB+: FAQ
+MAX14900D: FAQ
+MAX15090BEWI+: FAQ
+MAX1645AEEI+: FAQ
+MAX16600GGN+: FAQ
+MAX17823AGCB+: FAQ
MAX17823AGCB/V+: FAQ
+MAX17823AGCB/V+T: FAQ
+MAX17823GCB+: FAQ
+MAX182BEWI+T: FAQ
+MAX19777AZA+: FAQ
+MAX31865: FAQ
+MAX31865AAP+: FAQ
+Precision Technology Learning Modules
Programming FMC FRU ID EEPROM on Linux

AD7091R-X: FAQ

Q: AD7091R: VREF to power others parts of a circuit

Q Can I use the reference output on the AD7091R as the reference for other parts of my circuit? A Figure 14 in the data sheet shows the reference output voltage under various load conditions and temperatures. The reference voltage reduces with increasing load so it would be recommended to buffer the REFout voltage externally before using it externally.

Q: Why after every conversion of AD7091R is the MSB of the conversion result always “0”?

If the communication timing is ok this is usually due to the time between the /CONVST start pulse going low and reading back the conversion. The conversion time is 650ns maximum. If the result is read back before this time has elapsed then it is possible that the MSB will be zero. You can also use the BUSY indication feature to indicate when a conversion is complete by having /CS low prior to the EOC point. This will take the SDO line out of high impedance once a conversion completes and this can be detected by the SPI master.

Q: AD7091R Conversion Error After Exiting Power Down Mode

Q After exiting power down mode the conversion result is incorrect? A There are timing specifications to adhere to when exiting power down mode. The internal circuitry in the AD7091R takes 100us to power up from power down mode. This is the minimum time that must be maintained between exiting power down mode and starting the next conversion. Additionally if the on-chip reference is used it should be ensured that the external reference capacitor is charged to the correct potential to obtain a correct result. The time to recharge the reference capacitor is dependent on the charge remaining in the reference capacitor when the AD7091R exits power down mode.

Q: Are there IBIS models available for the AD7091R LFCSP and MSOP package?

There is an IBIS model available for the AD7091R MSOP package that can be downloaded at the following link: http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7091r/products/tools-software-simulation-models/index.html The characteristics for the MSOP package and the LFCSP package should be similar so it is recommended to use this model in simulations for the LFCSP package.

Q: After powering up the AD7091R why does the conversion result change after approximately 60 samples have completed?

After power-up ensure that the software reset as outlined in the data sheet is completed. A software reset initializes the AD7091R and ensures correct conversion results. The device will eventually initialize correctly after a certain number of conversions without a software reset but it is recommended for correct operation to always perform a software reset after a power cycle.

Q: AD7091r: Why when I measure the Idd current during operational mode do I get higher than the 554uA as quoted in the maximum rating in the data sheet?

Q Why when I measure the Idd current during operational mode do I get higher than the 554uA as quoted in the maximum rating in the data sheet? A The conditions for Idd current measurements in the data sheet are for a Vin = 0V. This means that the output codes are all 0s. If the output codes are toggling the current required to change the state of the SDO pin is increased and therefore Idd current is increased. The worst case current will be when the conversion result is 101010… The current drawn in a particular application will also depend on the capacitive load on the SDO line.

Q: Why the AD7091R ,when I measure the Idrive current during operational mode do I get higher than the 20uA as quoted in the maximum rating in the data sheet?

The conditions for Idrive current measurements in the data sheet are for a Vin = 0V. This means that the output codes are all 0s. If the output codes are toggling the current required to change the state of the SDO pin is increased and the Idrive current is increased. The worst case current will be when the conversion result is 101010. The current drawn in a particular application will also depend on the capacitive load on the SDO line.