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How many SPI frames do I need in order to read registers?

As per Figure 75 in the datasheet, when a register is pointed in one SPI frame, its content is received on the next frame. So, if reading N registers we will need N+1 SPI frames.

WENb it´s part of the command word, it means “Write Enable”. So, the AD7606x device is alerted the next bits will be R/W (read or write) followed by the register address.

For example, if we try to read the CONFIG register, followed by the RANGE_CH1_CH2 register and the ID register, the SPI sequence would look like:

In this example all registers are at their default value, and writing 0x0000 on the last frame switches the AD7606B from Register Mode to ADC mode such that the first frame on the following iteration corresponds to the ADC result of CH1 (0x000C) on the captured frame.

(Note both V1 and V1GND are floating, not connected to ground)

Tags: AD7606C-18 ad7606C-16 AD7606C ad7606b AD7606C-18_FAQ AD7606B_FAQ Show More
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  • RE: ad7768-4 SPI control port
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    Hi Labgeorge , To read a register, there is indeed two separate 16-bit transactions. As an example, please refer to the figure below. If I want to read register 0x02, I should write 0x82. In the...
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    Diego, I hope the following example will clarify the configuration process for you using the SPI interface. Using your example suggestion, assume we are writing to the LOS Threshold register (0x88H)...
 
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    Hi Labgeorge , To read a register, there is indeed two separate 16-bit transactions. As an example, please refer to the figure below. If I want to read register 0x02, I should write 0x82. In the...
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