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AD738x low latency feature


 The AD7380(AD738x family) has a low latency feature, how does this feature benefit the application?


The AD738x conversion result is read on the next cycle following the conversion process. The AD738x family low latency feature allows the latest conversion data to be read immediately as soon as it finishes A to D conversion of 190ns. A minimum of 10ns pulse for CS is required to occur after the conversion time then a high to low transition of CS happens to read the conversion result which requires 16 SCLK cycles for each channel in a 2- wire mode for dual and 4-wire mode quad version of the AD738x family.