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Documents Q11. What is the difference in output data rate between multiple channel configuration and single channel configurations for AD4111/AD4112/AD4114/AD4115?
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Products Mentioned

AD4114 Recommended for New Designs
The AD4114 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight...
Datasheet
AD4114 on Analog.com

Associated Drivers

AD4112 Recommended for New Designs
The AD4112 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for fully...
Datasheet
AD4112 on Analog.com

Associated Drivers

AD4111 Recommended for New Designs
The AD4111 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for fully...
Datasheet
AD4111 on Analog.com

Associated Drivers

AD4115 Recommended for New Designs
The AD4115 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight...
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AD4115 on Analog.com

Associated Drivers

Table of Contents
  • +Documents
  • +General: FAQ
  • +AD1139: FAQ
  • +AD7091R Conversion Result Change
  • +AD1556: FAQ
  • +AD1580: FAQ
  • +AD1582: FAQ
  • +AD2S1200: FAQ
  • +AD2S1205: FAQ
  • +AD2S1210: FAQ
  • +AD2S75: FAQ
  • +AD2S80: FAQ
  • +AD2S80A: FAQ
  • +AD2S82A: FAQ
  • +AD2S83: FAQ
  • +AD2S90: FAQ
  • +AD2S99: FAQ
  • +AD4110-1: FAQ
  • -AD411x: FAQ
    • Q1. What is the difference between the AD4111/AD4112/AD4114/AD4115?
    • Q10. On the AD4111/AD4112/AD4114/AD4115 what’s the equivalent TUE (total uncompensated error) spec across different input voltage ranges for example ±10V, ±5V, ±2.5V or 0-10V, 0-5V, 0-2.5V?
    • Q11. What is the difference in output data rate between multiple channel configuration and single channel configurations for AD4111/AD4112/AD4114/AD4115?
    • Q12. What is the SPI mode of operation of the AD4111/AD4112/AD4114/AD4115, what polarity do I need to consider?
    • Q13. Where can I find a full and workable sample code for AD4111/AD4112/AD4114/AD4115 for a ST processor?
    • Q14. What is the recommended initialization and register configuration sequence for AD4111/AD4112/AD4114/AD4115?
    • Q15. How many data registers does the AD4111/AD4112/AD4114/AD4115 have to store conversion results for each channel?
    • Q16. What are the General Purpose Input voltage threshold for AD4114, AD4115?
    • Q2. On the AD4111/AD4112/AD4114/AD4115 can I detect if the input signals are floating due to faulty wiring?
    • Q3. What is the recommended anti-aliasing filter required for the AD4111/AD4112/AD4114/AD4115?
    • Q4. Will the same anti alias filter work for both voltage and current inputs of AD4111/AD4112?
    • Q5. Why are the onboard Analog input buffers not required for current measurements AD4111/AD4112?
    • Q6. Can the AD4111/AD41112 current channels accept a bipolar (±20mA) inputs?
    • Q7. What is the AD4111/AD41112 current channel's common-mode input?
    • Q8. Why are the Analog input buffers required for voltage measurements AD4111/AD4112/AD4114/AD4115?
    • Q9. What’s the equivalent input impedance for a pair of voltage input pins of AD4111/AD4112/AD4114/AD4115?
  • +AD5940: FAQ
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  • AD7398 SPI Voltage vs VCC
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Q11. What is the difference in output data rate between multiple channel configuration and single channel configurations for AD4111/AD4112/AD4114/AD4115?

Q11. What is the difference in output data rate between multiple channel configuration and single channel configurations for AD4111/AD4112/AD4114/AD4115?

The AD4111/AD4112/AD4114/AD4115 can run at faster output data rates when converting on a single channel. When multiple channels are enabled the digital filter must settle fully for each channel and therefore the result is a slower output data rate.

As an example, For AD4111/AD4112/AD4114: When the filter is configured to Sinc5+Sinc1 and the fastest output data rate of 31250 SPS is selected.

For a single channel the effective output data rate is 31250 SPS, the time between conversions is 1/ODR = 32us. If “SING_CYC” bit is set or If more than one channel is enabled for the same filter configuration i.e. 31250 SPS then the time between conversions is 161us, because the digital filter must fully settle for each output. For more details about the timing you can download and view the AD4111 Filter Model.

For AD4115: When the filter is configured to Sinc5+Sinc1 and the fastest output data rate of 125000 SPS is selected.

For a single channel the effective output data rate is 125000 SPS, the time between conversions is 1/ODR = 8us. If “SING_CYC” bit is set or If more than one channel is enabled for the same filter configuration i.e. 125000 SPS then the time between conversions is 40.25us, the delay required is due to the filter settling time. For more details about the timing you can download and view the AD4115 Filter Model.

Tags: AD4115 AD4111 Filter model AD4114 filter single channel ad4112 output data rate multiple channel Show More
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  • Q8. What is the difference in output data rate between multiple channel configuration and single channel configurations for AD4116?
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