Answer:
Test Condition |
|
Long Term Drift (ppm/1000hrs) |
|
|||
Package |
TSSOP |
Standard LFCSP |
B-Grade LFCSP |
|
||
No Bake |
Typ |
+/-23 |
+/-89 |
+/-49 |
|
|
Max |
+/-96 |
+/-134 |
+/-88 |
|
||
85’C Bake |
Typ |
+/-17 |
+/-78 |
N/A |
|
|
max |
+/-66 |
+/-116 |
N/A |
|
||
The table shows the Internal reference long term drift over 1000 hours for the TSSOP package (standard AD7124-4 silicon), 0.75mm LFCSP package (standard AD7124-4 and AD7124-8 silicon) and the 0.95mm LFCSP package (B-grade AD7124-4B and the AD7124-8B silicon).
To measure the drift, parts were tested in an oil bath after being soldered to the PCB. Post solder, the internal reference was monitored for 1200 hours with the oil temperature maintained at 25’C. To allow some time for the package to de-stress post soldering, the first 200 hours of data is ignored. So, the table shows the internal reference drift with time for the 200 hours to the 1200 hours period.
Baking parts post soldering allows a package to de-stress faster. To confirm this, the standard silicon (TSSOP and 0.75mm package) were tested with a bake included. So, post soldering to the test board, the PCB was baked (placed in an oven) at 85C for 3hrs. Following this bake time, the boards were placed in the oil bath and the internal reference was again monitored for 1200 hours with the oil bath held at 25’C. The table indicates the results for the 200 hours to 1200 hours duration. It can be seen that the bake enables the package to de-stress quicker, leading to a better long-term drift (over 1000 hours) specification.
Note that the key thing to observe from the table is that all results show that the reference voltage is always within the datasheet initial spec of 0.2%.