I am trying to use a AD7175 with 2 channels. I require at least 1kSPS for each channel so I imagined setting it to 2.5kSPS would allow this. Instead it sets to 1.6kSPS.For reference I am using continuous read mode with "append" status register and CRC. I used a scope on the RDY pin to measure the output data rate.
I attempted to set HIDE_DELAY and the delay is actually set to 0.
Tested with some other data rates and it seems to be around 58% of the expected data rate
Not being exactly 1kSPS is not a issue but I would like to have predictable time periods when changing the data output rate. Is there an explanation for the low data rate?
I tried what you said, reset the device and hold CS low.The RDY pin period, between rising edges, is equivalent to 30ksps. For what I've seen the default datarate is ODR 250ksps which will produce 50ksps output. Again this seems to be about the 58% of the expected value.
This is a board from Mikroelektronika, I'm using it for tests. I don't supposed that matters since I am using external clock... it uses a AD7175-8. I could try to test in the actual product board if it's worth the shot, just haven't yet because it's not the easiest to get the scope on it and I am not the one that has it.