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Register configuration for ADAS1000-4 and ADAS1000-2 12 Leads configuration

I am working with these 2 ICs, and I have already configured registers for get working in 12 leads configuration measurement. You can see this in the previous post. However the signal recollected in the second chip is not the expected.

As you can see, signals coming from ADAS1000-4 (L1, L2, L3, AVR, AVL, AVF and V2) are correct, but signals coming from ADAS1000-2 (V3, V4, V5, V6 with exception of V1) are wrong. 

In ADAS1000-2 I have configured this registers:

reg = ADAS1000.REG_CMREFCTL
val = ADAS1000.MASK_CMREFCTL_LARLD | \
      ADAS1000.MASK_CMREFCTL_LLRLD | \
      ADAS1000.MASK_CMREFCTL_RARLD | \
      ADAS1000.MASK_CMREFCTL_V1RLD | \
      ADAS1000.MASK_CMREFCTL_V2RLD | \
      ADAS1000.MASK_CMREFCTL_CEREFEN | \
      ADAS1000.MASK_CMREFCTL_EXTCM

reg = ADAS1000.REG_FRMCTL
val = ADAS1000.MASK_FRMCTL_RESPPHDIS | \
      ADAS1000.MASK_FRMCTL_GPIODIS | \
      ADAS1000.MASK_FRMCTL_CRCDIS | \
      ADAS1000.MASK_FRMCTL_DATAFMT | \
      ADAS1000.MASK_FRMCTL_SKIP_4TH

reg = ADAS1000.REG_ECGCTL
val = ADAS1000.MASK_ECGCTL_LAEN | \
      ADAS1000.MASK_ECGCTL_LLEN | \
      ADAS1000.MASK_ECGCTL_RAEN | \
      ADAS1000.MASK_ECGCTL_V1EN |  \
      ADAS1000.MASK_ECGCTL_V2EN | \
      ADAS1000.MASK_ECGCTL_GAIN_2_8 | \
      ADAS1000.MASK_ECGCTL_VREFBUF | \
      ADAS1000.MASK_ECGCTL_CLKEXT | \
      ADAS1000.MASK_ECGCTL_GANG | \
      ADAS1000.MASK_ECGCTL_HP



In ADAS1000-4 I have configured this registers

reg = ADAS1000.REG_CMREFCTL
val = ADAS1000.MASK_CMREFCTL_LARLD | \
      ADAS1000.MASK_CMREFCTL_LLRLD | \
      ADAS1000.MASK_CMREFCTL_RARLD | \
      ADAS1000.MASK_CMREFCTL_CERLD | \
      ADAS1000.MASK_CMREFCTL_CEREFEN | \
      ADAS1000.MASK_CMREFCTL_DRVCM | \
      ADAS1000.MASK_CMREFCTL_RLD_EN | \
      ADAS1000.MASK_CMREFCTL_SHLDEN

reg = ADAS1000.REG_FRMCTL
val = ADAS1000.MASK_FRMCTL_V1DIS | \
      ADAS1000.MASK_FRMCTL_V2DIS | \
      ADAS1000.MASK_FRMCTL_RESPPHDIS | \
      ADAS1000.MASK_FRMCTL_GPIODIS | \
      ADAS1000.MASK_FRMCTL_CRCDIS | \
      ADAS1000.MASK_FRMCTL_DATAFMT | \
      ADAS1000.MASK_FRMCTL_SKIP_4TH

reg = ADAS1000.REG_ECGCTL
val = ADAS1000.MASK_ECGCTL_LAEN | \
      ADAS1000.MASK_ECGCTL_LLEN | \
      ADAS1000.MASK_ECGCTL_RAEN | \
      ADAS1000.MASK_ECGCTL_GAIN_2_8 | \
      ADAS1000.MASK_ECGCTL_VREFBUF | \
      ADAS1000.MASK_ECGCTL_CLKEXT | \
      ADAS1000.MASK_ECGCTL_MASTER | \
      ADAS1000.MASK_ECGCTL_GANG | \
      ADAS1000.MASK_ECGCTL_HP


Can you indicate me if my register configuration is correct or I need to change something for get the desired functionality.

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  • Hello Jefferson,

    Thanks for message and detailed information.

    A very quick question to ensure i understand correctly - when you say V3 etc are wrong - what do you mean?

    It looks like they are returning a ~1mV signal similar to the other channels? The offset voltage looks different, but that may be expected.

    best regards,

    Catherine

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  • Hello Jefferson,

    Thanks for message and detailed information.

    A very quick question to ensure i understand correctly - when you say V3 etc are wrong - what do you mean?

    It looks like they are returning a ~1mV signal similar to the other channels? The offset voltage looks different, but that may be expected.

    best regards,

    Catherine

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