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AD7124-8 DOUT/RDY correct Data Ready implementation

Category: Datasheet/Specs
Product Number: ad7124

Hello,

Refering from my current experience, also the forum topic https://ez.analog.com/data_converters/precision_adcs/f/q-a/24693/ad7124-4-dout-rdy-pin, would like to know how should the correct implementation of DataReady functionality be achieved?

The problem is when framing R/W operations, it is neccessary to set and reset ChipSelect(CS) pin. I'm using AD7124-8 in Single Conversion mode, hence after writing ADCControl register to trigger a single measurement, reset CS pin to high. As soon as CS pin is high, DOUT/RDY pin does not work as DataReady pin and the pin moves into tristate.

CS_EN bit is set to 1 for having SPIErrors diagnostics but clearing to 0 does not make any difference.

DOUT/RDY pin is only functioning as the DataReady pin when CS pin is set to low but it is unclear if such sequence could be used as intended.

P.s. we have 11 years later on and the manual has not been updated yet.

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