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AC excitation signals

Thread Summary

The user is implementing an external chopping scheme with the AD7195BCPZ ADC using a MOSFET switch to periodically swap differential input signals (Vline+ and Vline-). The final answer confirms that the reference inputs (VREF+ and VREF-) should also be swapped synchronously with the analog inputs for accurate conversions. When AC excitation/chopping is disabled, the ACX outputs are high (ACX1, ACX2) and low (A̅C̅X̅1̅, A̅C̅X̅2̅), with T2 and T4 transistors on and T1 and T3 off. The application note CN0155 provides further insights into AC excitation and external chopping schemes for the AD7195.
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Category: Datasheet/Specs
Product Number: ad7195

Hi,

I am working on a PCB design using the AD7195BCPZ ADC, and I would like to use the AC excitation outputs (ACX) to implement an external chopping scheme using an external switch made of 2 NMOS + 2 PMOS transistors.

My setup is the following:

  • Differential input signals:

    • Vline+

    • Vline-

  • ADC reference:

    • VREF+ = 4.5 V

    • VREF- = 0 V (GND)

The intention of the external MOSFET switch is to periodically swap the ADC analog inputs so that:

  • Vline+ alternates between AIN1 and AIN2

  • Vline- alternates correspondingly between AIN2 and AIN1

So effectively, I am externally inverting the differential input polarity synchronously with the AC excitation/chopping signal.

My question are:

When using this external chopping approach, is it also necessary to swap/invert the reference inputs (VREF+ and VREF-) synchronously with the analog inputs?

Or is it sufficient to keep:

  • VREF+ fixed at 4.5 V

  • VREF- fixed at GND

while only swapping the analog differential inputs?

Also, regarding the ACX outputs: what is their default electrical state when AC excitation/chopping is disabled? Are they driven to a defined logic level, or do they go into a high impedance state?

My system is not a ratiometric bridge measurement; the reference is not part of the excitation path.

I would appreciate any recommendation or application note reference regarding the correct way to implement external chopping with the AD7195.

Thanks.

Parents
  • Hi  ,

    When using external chopping, ensure that the reference inputs (VREF+ and VREF-) are alternated in sync with the analog inputs during external chopping. This is critical for accurate conversions and offset elimination.

    When the ACX bit in the configuration register is set to 0 (disabled), the digital outputs ACX1 and ACX2 are high, while outputs A̅C̅X̅1̅ and A̅C̅X̅2̅ are low. Therefore, the bridge is dc excited with the T2 and T4 transistors turned on and the T1 and T3 transistors turned off.

    For reference design documentation, check the application note CN0155, for further insights into implementing AC excitation and external chopping schemes particularly for AD7195.

    Thanks,
    Francis

  • Hi Francis! Thanks a lot for your answer! I'll let you know once I have tested this implementation.

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