Category: Datasheet/Specs
Product Number: AD7606-4
Hello,
I have a question about the control of the /CS pin for the AD7606-4.
The AD7606-4 outputs sampled data from the DoutA and DoutB pins.
When the /CS is asserted after the BUSY is de-asserted and remains for 64 SCLK clocks, it outputs 4 channels of data from DoutA and DoutB.
The data formats are as follows:
DoutA: V1 – V2 – V4 – V3
DoutB: V3 – V4 – V2 – V1
When two output ports are used, four channels of data are obtained by closing the /CS at 32 clocks.
Can he then get new four-channel data by inputting a pulse to the CONVST(A/B)?
I think so, but I could not find a description of this in the datasheet.
Best regards,
y_suzuki
