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AD7293 GaN PA Bias controller

Thread Summary

The user inquires about the necessity of GPIO connections for the AD7293 PA Bias controller in a 4Tx4R TDD configuration. The final answer suggests that while the SLEEP and ALERT GPIOs are mandatory, the BUSY signal is optional but useful for bias calibration. For the prototype phase, it is recommended to connect more control signals to fully explore and optimize the AD7293's features.
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Category: Hardware
Product Number: AD7293

Hello, we are using AD7293 PA Bias controller for GaN PA in RU design for TDD Mode of operation.

it is 4Tx4R configuration. so we are using 1 nos of AD7293 for each GaN PA.

So overall we are using 4 nos of AD7293.

the query is, do we require all the GPIO connection to the FPGA( 7nos in total) for controlling the PA Functionality?

mean, are the GPIOs mandatory?

can we use only the SPI interface for FPGA control.

well, kindly let us know what the mandatory signals are required for the TDD mode of operation.

Regards,

Sumathi

  • Hi ,

    If you are looking for minimalistic approach, I believe you would need to connect at least one SLEEP input (to clamp the DACs) and I believe also ALERT as depending how you intend to handle the alerts etc.

    BUSY signal may be also useful to you, if you will be using bias calibration in open loop mode. However, I believe it is possible to work around the same based on timing. 

    For prototype phase I would recommend to rather connect more control/alert signals to AD7293 than less. Perhaps having at least 1x dedicated AD7293 with full connection maybe useful to explore and understand the features and controlling approach. This will be most useful to you to optimize the timing and control perspective and will allow quick SW experimentation.

    Regards,

    Arnost