Dout data is not correct when reading internal registers

Question

Hello, 
 I have some difficulties to communicate with the AD7192. Actually, I don't understand the DOUT after readings. 
 Here is a capture of the communication (Yellow is SCLK, Green is DOUT, Blue is DIN and Pink is CS) 
 
 If I zoom, the first bits are 40 consecutive 1s to reset the chip. 
 
 Then, I try to read the ID Register 
 
 It returns 0x40. I've read on other posts that I should get 0x80 so I'm already a bit confused. 
 Then I try to write in the mode register 0b001010000010000000000010 
 
 And finally I try to read back this register but the device return 0xFFFFFF. Not the value I expected. 
 
 I can already confirm that device is powered (AVDD and DVDD are 3.3V) and SYNC pin is kept high during all the communication. I've also counted the sclk fronts to be sure it's a multiple of 8, so the device shouldn't be stuck in an unexpected state because of that. So, do you have any ideas why readind doesn't seem to work ?

Pranjali · Accepted Answer

Hi, 
 We suspect that the read and write operations may not be functioning correctly in your setup. To help rule out any potential communication issues, we recommend performing some basic SPI read and write tests before proceeding with conversion reads. 
 Please follow the steps below: 
 
 Add pull-ups to the SCLK and DIN lines to the digital supply rail. This ensures that these lines are held at a known logic level when not actively driven, preventing any corrupt data from being written to the AD7192. 
 Perform a reset, then read the Mode Register and verify that you are receiving the expected default value. This will confirm that the read operation is functioning correctly. 
 Write to the Mode Register to change the Output Data Rate (ODR). After writing, read back the register to confirm that the updated value has been correctly written. 
 Monitor the RDY line when , CS is tied low. You should observe pulses at the new ODR, indicating that the ADC is operating based on the newly configured settings. 
 Verify the correct number of SPI clocks: 
 Ensure that 8 clocks are provided when writing to the communication register. 
 Ensure that 24 clocks are used for reading from or writing to the mode register (and other 24-bit registers).

If all the above steps are successful, it will confirm that SPI communication is working as expected. Once this is validated, we can move on to investigating the conversion results. 
 
 Thanks, 
 Pranjali)

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Dout data is not correct when reading internal registers

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