Synchronise sampling on an interrupt manage by a µC

Hi Martial73 ,

Do you want the samples to be available every 250 uS or ODR = 4kHz?

Can you also clarify what "IT Start sampling" means in the figure?

Whether you apply the sync pulse through SYNC_IN, START, or by writing to SPI_SYNC bit, there should be DRDY pulses after.

There should be DRDY pulse upon power up. Can you try writing to SPI_SYNC bit?

Please share the schematic and register settings.

Thanks,
Janine

Hi Martial73 ,

Do you want the samples to be available every 250 uS or ODR = 4kHz?

Can you also clarify what "IT Start sampling" means in the figure?

Whether you apply the sync pulse through SYNC_IN, START, or by writing to SPI_SYNC bit, there should be DRDY pulses after.

There should be DRDY pulse upon power up. Can you try writing to SPI_SYNC bit?

Please share the schematic and register settings.

Thanks,
Janine

Hello Janine,

Thank you for your reply.

I set my ODR at 5kHz to have a DRDY pulse each 200µs. I'm not sure to understand the difference between samples available every 250µs and ODR = 4kHz. Could you explain to me ?

"IT Start sampling" => IT = µC interrrupt and Start sampling = pulse to 0V on START signal

Here a new figure to explain what I try to do:

I will try writing to SPI_SYNC bit to see the behavior (maybe Friday, because I can't work on this subject before).

Below is the schematic:

I will send you registers values Friday. Following are configuration setting inside C code:

• PWRMODE = high resolution,
• Clock prescaler = 1 (DCLK_DIV),
• ODR = 5kHz,
• Use external reference.

Note: if I don't try to command START pin (no synchronization), DRDY signal comes every 200µs.

Thanks,

Martial