AD7610
Production
The AD7610 is a 16-bit charge redistribution successive approximation register (SAR), architecture analog-to-digital converter (ADC) fabricated on Analog...
Datasheet
AD7610 on Analog.com
AD7610 - For 0-10V setting, the analog input is not supposed to exceed 10.1V. However, under Absolute Max ratings, it can go up to VCC + 0.3 V. What happens if in assert CVSTn with a 2usec pulse at 10.5V? Is it ignored (aka no BUSY)? Is it converted as FFFF? Is it converted as xxxx? For what's it worth, I would like out of range signals to be ignored.
Note: I will make sure that the pulse does not exceed the Absolute Max rating. However, it seems that since VCC is spec'ed up to 15V, the input can exceed 10.1V with out damaging the circuit. I just can't infer how the output behaves (given the 0-10v range). I'm available to talk by phone if that would help. I'm in USA Eastern Time.
Note2: I am trying to modify my control circuit to NOT assert CSTn when the signal exceeds 10V (with an LT1011 comparator). It looks promising.
I was able to "gate" the CVSTn with the LT1011. The input does exceed 10V (but stays below VCC). However, these pulses are ignored. Out of engineering curiosity, I am curious how out-of-range signals would be handled, but you can close this inquiry.
Hi, WMilam .
The ADC will convert it to Full scale if your input goes beyond the maximum input range. On the other hand, it is best practice to not exceed the maximum input range of the device. The device will still work within the absolute maximum rating. But the performance of the device is not guaranteed. Thus, stay within the input range for the optimal performance of the device since that is where the device was tested to be in its optimal state.
I hope this still help your query. Feel free to post if you still need help.
Warm regards,
Jo