I'm reading datasheet of AD7386 and do not understand CRC Example in Table 16. Why the first 8 MLB invert from Data to Process Data? Is there something I missed?
AD7386
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The AD7386/AD7387/AD7388 are 16-bit, 14-bit, and 12-bit dual, simultaneous sampling, high speed, successive approximation register (SAR), analog-to-digital...
Datasheet
AD7386 on Analog.com
I'm reading datasheet of AD7386 and do not understand CRC Example in Table 16. Why the first 8 MLB invert from Data to Process Data? Is there something I missed?
Hi, EvernessW .
This is for the CRC checksum calculation of the AD7386. The 16-bit data of the two channels are combined which produces a 32-bit data. The data are shifted 8 times, just like in the figure provided, to create the processed data. The processed data resulted to the inversion of the first 8 bits of the data, along with the eight logic 0s at the end. This process is needed to an XOR, to create/produce the output of the CRC.
Regards,
Jo