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Anti-aliasing filter for AD7799

Category: Hardware
Product Number: AD7799

I've designed a board with the AD7799 where the three inputs are used for measuring three load cells.

Once the board is powered, the AD7799 is reset sending 32 1's and then configured with fADC = 4.17 Hz. After this I'm reading each input: AIN1, AIN2, AIN3, AIN1, AIN2, AIN3...

I've tried different configurations at the input of the ADC and the anti-aliasing filter that you recommend, R = 1 kOhm, C = 10 nF and Cd = 100 nF, is not really working for me. Short-circuiting the input connector before the filter I observe like a reaaally slow AC variation that is not present in the input that has not filter (R = 0 Ohm, C = Cd = Open).

Here you can observe the different channels, and the one with the variation belongs to the input with anti-aliasing filter

https://ibb.co/J5tKtYk
https://ibb.co/3mCbm6m
https://ibb.co/CH1DJSb

Is this normal? Can you recommend next steps?

Thanks,
Sergio

  • Hi  ,

    Are you using the ADC in buffered or unbuffered mode? In unbuffered mode, the unbuffered input path provides a dynamic load to the driving source. Therefore, resistor/capacitor combinations on the input pins can cause gain errors, depending on the output impedance of the source that is driving the ADC input. You may refer to Table 17 of the datasheet (AD7798/AD7799 (Rev. B)) for the allowable external resistance/capacitance values for unbuffered mode such that no gain error at the 20-bit level is introduced. Also note that the AD7799 can be operated in unbuffered mode only when the gain equals 1 or 2. At higher gains, the buffer is automatically enabled. 

    Additionally, AD7799 is an old product, and we usually recommend newer products for new designs. The recommended replacement is AD7124-4/AD7124-8 B grade. It has all the building blocks of the above ADCs with a more advanced features and better performance.

    Thanks and Regards,

    Coco

  • Sorry  for not adding this information, the buffered mode is active, and I'm using a gain of 32 (thinking to change to 128).

    The behaviour in the plot that you can see is more or less fine but I have some plots where the standard deviation is much much bigger, in the order of a hundred counts.

    When I'm not doing the shorts and using the load cells the behaviour is the same, working pretty fine without the filter. The layout I think is quite fine, having a solid ground under the top layer and routing a short differential pair from the connector to the IC. The SPI goes through the bottom layer and also solid GND in Layer 3, going to top with a via close to the pads (also GND vias close).

    Changing to a new ADC I think is not going to be an option right now... 

    Thanks,

    Sergio

  • Hi  ,

    Apologies for missing this thread. Could you please share your schematic and configuration settings to assist us in further diagnosing the issue?

    Are you operating/using the device in ambient temperature?

    Thanks and regards,

    Rod

  • Hi  ,

    Sorry for not sharing the whole schematic but I can't do it. The schematic follows the recommendation: A 1 kΩ resistor in series with each analog input, a 0.1 μF capacitor from AIN (+) to AIN (–), and a 0.01 μF capacitor from each analog input pin to GND. 

    - The input and output impedance of the load cell is 1 kOhm. The sensitivity is 2mV/V and the load cells and the AD7799 is powered by an LDO just for them.

    - REFIN(+) is connected to +5V. REFIN(-) is connected to GND.

    - The different AINx(+) and AINx(-) are connected to the filter described above.

    - DVDD is connected to +3V3 and AVDD to +5V. All the power (and ref) pins are decoupled with 2x100 nF and the LDO has a 10 uF at the output.

    For the config:

    - The buffered mode is active, and I'm using a gain of 32 (thinking to change to 128).

    - Once the board is powered, the AD7799 is reset sending 32 1's and then configured with fADC = 4.17 Hz. After this I'm reading each input: AIN1, AIN2, AIN3, AIN1, AIN2, AIN3...

    The SW team has to change the gain and also add the zero calibration once the device is powered but still I think the current behaviour with or without filter is not the expected.

    The description of the layout is above but if you need more info about anything I'll figure out how to share it with you.

    Thanks for your help.

  • Hi,

    Have can you also please confirm if you have not violated any of the Analog Input specifications of the ADC below (especially in buffered mode)? 

    When the gain is set to 4 or higher, the in-amp is enabled. The absolute input voltage range when the in-amp is active is restricted to a range between GND + 300 mV and AVDD − 1.1 V. Care must be taken in setting up the common mode voltage so that these limits are not exceeded; otherwise, linearity and noise performance degrade. 

    Aside from performing internal calibrations, I would also recommend performing a system calibration also which would cover internal and external corrections/calibrations. Then, see if this addresses your issue. 

    Thanks and regards,

    Rod