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Question about calibration - gain and offset registers not updating.

Category: Software
Product Number: AD7124-8

Hello all, I am following up on a previous question i had while using the AD7124-8 to measure multiple RTDs. Now my question is concerning the process of internal gain and offset calibration. When doing the calibration, the offset and gain registers never get updated.

1. First i enable the channel I am trying to calibrate. In this case, it is channel 0. I can read the all channels back and this is the only one enabled now.

2. I write a value of 0x800000 to the offset register (OFFSET_2 in this case since i am using SETUP 2)

3. I configure the ADC control register with the value of 0x25B (Internal Full scale calibration mode, external clock, CS_EN high, Mid power mode).

4. I have a while loop that waits for DOUT/RDY pin to go to low. Does a dummy read of the data register to bring data ready pin low. 

5. I set a delay for 4 settling periods for full scale (at 10Hz, this is 1200ms)

6. I set the mode to ZS cal mode (write a 0x257 to include all the above mentioned bits and also change the mode to 0101)

7. I use the same while loop and timer. 

Then i read the offset and gain registers. The gain register is all 0's and the offset register reads 0x800000. I am thinking that i am doing the calibration wrong and it doesn't write anything at all to the gain and offset registers. When i comment out my self-cal code, the ADC gets good measurements from the RTDs, albeit a little off. Does anyone have an idea on what this issue could be?

  • Hi  ,

    Your process flow for performing internal calibration looks correct.

    Can you share your complete register configuration settings and schematic to further explore/understand the issue? 

    Can you also confirm if you are using ratiometric configuration? If so, can you confirm if you have enabled your IOUT for RRef? A valid reference is required when performing internal calibrations. Kindly confirm if you have a valid reference during your internal calibrations. 

    4. I have a while loop that waits for DOUT/RDY pin to go to low. Does a dummy read of the data register to bring data ready pin low. 

    • When the conversion is read, DOUT/RDY returns high until the next conversion is available.
    • If the data is not read after the conversion, the pin goes high before the next update occurs.

    Also note that from an operational point of view, treat a calibration like another ADC conversion. Set the system software to monitor the RDY bit in the status register or the DOUT/RDY pin to determine the end of a calibration via a polling sequence or an interrupt-driven routine. When the calibration is complete, the contents of the corresponding offset or gain register are then updated, the RDY bit in the status register is reset, the DOUT/RDY pin returns low (if CS is low), and lastly, the AD7124-4 reverts to idle mode.

    Thanks and regards,

    Coco

  • Hi  

    I can confirm that i am using a ratiometric configuration (I think) and have enabled IOUT0 to the Reference resistor. I set a delay right after i turn on the current so the internal RC components have some extra time in case. For the configuration i have: 

    UNIPOLAR_SEL | BURNOUT_OFF | REF_BUFP | REF_BUFM | AIN_BUFP | AIN_BUFM | REF_SEL0 | PGA_GAIN8
    Filter is set to 10Hz output data rate right before calibration. I am using the first four AIN pins for the channel that i am trying to calibrate, where ain 0 is the current source, ain3 is the current return. AIN1 is positive lead, AIN2 is negative lead. 
    As of right now, i set the mode to standby mode before running the self-cal function i have created. After doing this it will occasionally the correct values in the gain and offset registers, but only if i put a breakpoint in my debugger and read the value. After i resume the code, the adc will continuously report good calibrated conversion values and respond to changes in the resistance. I also say occasionally because sometimes it is like it never runs through cal but stays at the default 5XXXXX value. I'm looking to see if this is an issue unrelated to the ADC, but it seems like i am doing something improperly. Let me know if you have any ideas.
    Thanks,
    L
     
  • Hi  

    Please disregard my other comment. thanks to a clarification you made and also taking this statement from the data sheet into consideration: " the DOUT/RDY pin returns low (if CS is low)(from pg.53 of the AD7124-8 Rev F. datasheet)". I was not bringing CS low.
     
    Now i just use a while loop to wait and see if dout/rdy goes high, then set CS low. After it gets out of this loop, i set CS high. I did not have to set it in Standby mode so it made it very simple.
    So, after setting all the registers correctly, then setting the mode to internal full-scale calibration mode, i wait for DOUT/RDY to go high. While it is high, i set CS low. It exits the loop and i set CS high. I do the same for zero-scale calibration mode.
    Thanks,
  • Hi  ,

    You're welcome. If you have any more questions, feel free to post a new thread on our forum.

    Thanks and regards,

    Coco