Hello,
Please confirm the worst-case Allowed Rise Time for Clock for IC LTC2484.
LTC2484
Production
The LTC2484 combines a 24-bit No Latency ?S™ analog-to-digital converter with patented Easy Drive™ technology. The patented sampling scheme eliminates...
Datasheet
LTC2484 on Analog.com
Hello,
Please confirm the worst-case Allowed Rise Time for Clock for IC LTC2484.
Hello Krn ,
Apologies but this is only guaranteed by design and are not subject to test. Being said, we can only assure that communications will be alright if the duty cycle specification, which is 45% to 55%, and a clock frequency of 38.4 kHz are met.
Regards,
Yugel
Thank you for the reply.
My understanding is that for a 26us time period (38.4kHz clock), the guaranteed ON time should 13us (~50% duty). This means that total transition time (rise time + fall time) should be within remaining 13us. Is this understanding correct ?
Hello Krn ,
Yes, you are correct. Though it may be nice to note that falling is oftentimes faster than rising.
Regards,
Yugel