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ADC AD4134

Category: Hardware

Hi : 

I have a question about AD4134 design.

I used FPGA to control AD4134.

I'm wondering that how to make sure AD4134 is conversion finished that I can catch data from AD4134 ? 

The AD4134 dosen't have output pin like busy or ready to FPGA  , so I not sure that FPGA read the DATA is correct.

thanks!

//register setting—(in ordor)----------------------------

 

Address

Register data

0x00

8’b0001_1000

0x11

8’b0010_0000

0x12

8’b0000_1011

0x02

8’b1111_0001

0x10

8’b0000_0010

0x13

8’b0000_0010

0x1E

8’b1010_1010

0x22

8’b0010_0000

0x23

8’b0000_0001

0x24

8’b0000_0000

0x25

8’b0010_0000

picture 1 : 

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